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Yes. TSMC chairman and CEO C.C. Wei confirmed on January 16, 2025, that the company charged somewhat more for wafers made in the United States than for wafers made in Taiwan. He cited the value of geographic flexibility and the higher U.S. cost structure. He did not disclose a percentage or dollar amount, and the statement does not show whether finished phones, computers, or other products will cost more.
What TSMC actually said about U.S. pricing
On TSMC’s Q4 2024 earnings call, Arete Research analyst Brett Simpson asked about wafer pricing in the United States compared with Taiwan. Wei answered: “Do we charge a little bit higher? Yes, we did, because we have a value of geographic flexibility, right? And you guys know Made in USA is a premium product.” He added that TSMC had discussed the higher price with customers and that they agreed to work with the company. Read the official Q4 2024 earnings call transcript.
The word “chips” is shorthand here. The exchange concerned TSMC’s foundry price for making wafers for chip-design customers—not a published retail price for individual chips or consumer devices. Wei’s “premium product” description is not a formula or a quantified surcharge.
How much more do U.S.-made wafers cost?
The call gives no amount. Wei described the price as “a little bit higher,” but did not provide a dollar figure, percentage, or pricing schedule. The transcript also does not break down how much of the difference reflects U.S. operating costs versus the value customers place on geographic flexibility, or identify customers accepting a particular surcharge.
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That means there is no supported figure to use for estimating the extra cost of a U.S.-made wafer. Avoid treating percentages reported or speculated elsewhere as TSMC’s disclosed U.S. premium: the primary statement supplies none.
Why charge more for U.S. production?
Geographic flexibility
Wei said customers place value on geographic flexibility. Having production in more than one location can give customers another source of manufacturing capacity; his answer identified that flexibility as part of the reason for the higher price. The call did not assign it a separate dollar value.
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- Wafer Pattern May Vary from the Product Images. Great to be used as gift, display object, exhibition, educating demonstration, testing, decoration or your collection
- Beautiful microchip pattern structure made by the advanced copper technology
- 90~130nm minimum microchip feature Copper Characterization with TEOS or Black Diamond Low-k ILD on the single crystal silicon wafer
- The original value of un-polished wafer is above $500
- No guarantee for research and other applications
Higher U.S. costs
Wei also cited the U.S. cost structure. He did not itemize which costs contributed to the price difference or say how they compared individually with Taiwan costs.
Does this mean phones and computers will cost more?
Not on the evidence in the call alone. TSMC’s wafer price is a business-to-business charge to its customers. The transcript does not establish whether, or how much, those customers might pass through to device makers or shoppers. A higher foundry price therefore cannot be translated directly into a retail increase for a phone, computer, or other product.
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- 5 x 5 inches, 0.67 ounces, 0.03 inches thick. Some wafers are marked with alignment marks.
- The pattern is produced by light diffraction, and its reflective appearance changes with the viewing angle.
- Silicon wafers are fragile—please handle with care.
- Circuit details can be examined under a microscope.
What Arizona production context tells us—and what it doesn’t
TSMC said on the January 16, 2025 call that its first Arizona fab was in volume production and that construction of its second fab was nearly complete, with facility installation beginning. In its July 17, 2025 call, the company said the first Arizona fab had entered high-volume N4 production in Q4 2024, with yield comparable to its Taiwan fabs. See TSMC’s Q2 2025 call materials.
TSMC’s Arizona overview lists six logic wafer fabs, two advanced packaging facilities, and an R&D center among its plans. It targets second-fab N3 volume production for the second half of 2027 and third-fab volume production by the end of the decade, with N2 and A16 processes planned for the third fab. These are company plans and targets, not a statement that the facilities are already operating.
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Investment announcements provide more context for the scale of the plans, not a measure of output or the wafer premium. In March 2025, TSMC announced an intention to add $100 billion to its previously stated $65 billion U.S. investment plan, bringing the planned total to $165 billion. In July 2026, the Associated Press reported a further $100 billion commitment, bringing announced U.S. investment plans to $265 billion. Those figures describe commitments and plans, not amounts already spent or current production capacity. TSMC’s March 2025 announcement; Associated Press report, July 2026.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Is the U.S. premium the same as reported 2027 price increases?
No. The U.S.-versus-Taiwan premium discussed by Wei was a location-related pricing detail confirmed in January 2025. A July 2026 Tom’s Hardware report, citing Nikkei, described expected 2027 TSMC price increases by process node and capacity. That is a separate reported pricing issue, not proof of the amount—or continued terms—of the U.S.-made wafer premium. Read the July 2026 report. The available statements do not establish a current Arizona-versus-Taiwan price differential.
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