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YMTC Expands Memory Production With Three Reported Fabs and a Possible DRAM Push

Reuters sources say YMTC may add three Wuhan fabs, more than doubling reported wafer capacity and reserving some space for DRAM. The expansion is significant, but construction targets are not the same as high-yield shipments or a confirmed commercial DRAM launch.
From TheFinanceBase Team7 min to read
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YMTC, China’s largest NAND flash producer, is reportedly planning three additional Wuhan factories. Reuters sources say one could be completed in 2026 and two more could follow, lifting the company’s combined wafer-start capacity from about 200,000 12-inch wafers per month to roughly 400,000 when all three plants reach full operation. The same sources say each new fab would reserve some capacity for DRAM, although YMTC has not publicly confirmed the construction schedule, the DRAM process, product launch date or final capacity split.

That distinction matters. The reported plan is a strategic expansion and a possible entry into DRAM—not evidence that YMTC is already shipping competitive DRAM in volume.

What YMTC is reportedly building

Reuters, citing people familiar with the plans, reported that YMTC’s existing Wuhan operations produce about 200,000 12-inch wafers per month. A third factory is expected to be completed in 2026, followed by two additional factories. Each new plant is reportedly designed for approximately 100,000 wafers per month at full capacity. The report does not establish whether the three projects are separate fabs, phases of a larger campus or separate legal entities.

The company has not publicly detailed the projects on its English-language corporate pages. The Reuters report should therefore be treated as source-attributed planning information rather than a finalized corporate production commitment. Reuters report carried by Investing.com

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Construction is not the same as output

A fab passes through several stages before it contributes dependable shipments:

  1. Cleanroom construction: the building and controlled environment are completed.
  2. Equipment installation: process, inspection, metrology and packaging tools are connected and qualified.
  3. Pilot production: wafers run through the process while engineers identify defects and tune recipes.
  4. Customer qualification: products are tested for reliability and compatibility.
  5. Volume production: usable die yields and factory uptime become commercially viable.

Consequently, the reported 2026 completion target does not mean that all three plants will immediately produce 300,000 additional wafers each month.

How large could the capacity increase be?

Stage Approximate combined capacity
Existing two fabs, Reuters estimate 200,000 12-inch wafers per month
Each reported new fab at full capacity 100,000 wafers per month
Three reported new fabs at full capacity 300,000 wafers per month
Potential total after full ramp About 400,000 wafers per month

These are wafer-start figures, not finished memory-bit output. The number of sellable bits depends on NAND layer count, die size, TLC or QLC mix, wafer utilization, yield, testing, packaging and the share assigned to DRAM. A 100,000-wafer-per-month design capacity therefore cannot be converted directly into a fixed percentage of global memory supply.

Why the reported DRAM allocation changes the story

NAND, DRAM and HBM serve different jobs

  • NAND flash is nonvolatile storage used in SSDs, phones, memory cards and embedded storage.
  • DRAM is volatile working memory used in PCs, servers, phones and other systems.
  • HBM is a specialized, high-bandwidth DRAM package used in artificial-intelligence and high-performance-computing systems.

Two Reuters sources said all three new factories would reserve some capacity for DRAM, with the amount depending on YMTC’s technology progress. The report does not establish a DRAM process node, product generation, yield, customer, launch date or monthly output. A DRAM-capable cleanroom, a pilot line and a qualified commercial product are different milestones. Reuters expansion report

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YMTC’s public materials continue to describe the company primarily as an integrated manufacturer of 3D NAND, listing NAND wafers, packaged memory, SSDs, eMMC and UFS products. Its product pages do not publicly confirm a mass-produced YMTC DRAM line. YMTC company profile · YMTC product categories

YMTC’s established NAND technology base

YMTC says it began mass production of second-generation 3D NAND in 2019. Its fourth-generation TLC and QLC products entered mass production in 2023, fifth-generation TLC in 2024 and fifth-generation QLC in 2025. The company also says Xtacking 4.0 received the Most Innovative Technology Award at FMS 2025. YMTC production milestones · YMTC news

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What Xtacking does—and does not do

In Xtacking, YMTC processes the CMOS and memory-cell wafers separately, then bonds them with vertical interconnects. The architecture is intended to improve input/output performance, density and manufacturing flexibility. It is a 3D NAND architecture, not a DRAM process. Success with Xtacking does not by itself demonstrate that YMTC has solved the different cell, capacitor, patterning and reliability requirements of competitive DRAM. YMTC Xtacking technical explanation

Reuters described Xtacking 4.0 as broadly comparable with leading NAND suppliers’ products; that comparison is Reuters’ characterization, not an independently verified benchmark.

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Why YMTC would pursue more capacity and DRAM

  • Reduce import dependence: China relies heavily on Samsung, SK hynix and Micron for DRAM. A domestic alternative could improve supply resilience for Chinese device and server makers.
  • Serve expanding memory demand: AI servers require large quantities of memory, although AI demand alone does not explain the reported decision.
  • Use capacity flexibly: Mixed NAND and DRAM capability could give YMTC more options when memory markets move through their cycles.
  • Support industrial policy: YMTC, founded in Wuhan in 2016, has benefited from local and state-backed support for semiconductor development.
  • Increase bargaining power: Greater domestic supply could strengthen YMTC’s position with Chinese OEMs and systems companies.

The move would place YMTC alongside CXMT, China’s principal dedicated DRAM challenger, while Samsung Electronics, SK hynix and Micron remain major global DRAM suppliers. Kioxia remains a major NAND competitor.

How U.S. export controls complicate the expansion

U.S. controls cover categories of semiconductor-manufacturing equipment, software used to design or produce chips, certain memory technologies and HBM, as well as entities involved in China’s semiconductor development. In December 2024, the Commerce Department announced controls covering 24 equipment categories, three software-tool categories, HBM and additional Entity List designations. U.S. Commerce Department December 2024 controls

The practical issue is not simply whether YMTC is broadly “sanctioned.” It is whether the company can obtain, install and maintain the particular tools required for advanced NAND layer scaling, wafer bonding, lithography, process control, metrology and DRAM patterning. Licensing and restrictions can vary by item, supplier, end use, facility and entity designation. The applicable regulatory framework is set out in EAR Part 744; BIS also maintains background information on semiconductor export controls at its export-controls information page.

Domestic Chinese equipment can improve resilience, but resilience is not the same as unrestricted access to the highest-performing foreign tools. Differences in uptime, process control, software integration and yield may affect how quickly a completed building becomes a competitive factory.

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What could prevent the plan from succeeding

Equipment access and maintenance

A fab may be physically complete yet unable to reach commercial output if restricted tools, spare parts or service support are unavailable. Domestic substitutes may require additional qualification and process adjustment.

Yield learning

Memory economics depend on the proportion of each wafer that becomes usable die. DRAM development is particularly demanding because of tight tolerances, cell and capacitor engineering, defect control and reliability requirements.

Customer qualification

Working dies are not enough. Customers may require evidence on retention, endurance, error rates, thermal behavior, package reliability, controller compatibility and long-term supply consistency.

Capital and timing

The 400,000-wafer figure is a long-term full-ramp scenario, not a near-term shipment forecast. Construction, tool installation, process qualification and yield improvement can take years.

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Market cycles and product mix

Additional NAND supply could pressure prices if demand does not keep pace. If DRAM development uses capacity that might otherwise produce NAND, the expansion could add fewer NAND bits than the wafer headline suggests. Conversely, a shortage could improve the economics of new capacity while making tools and materials more expensive.

Geopolitical escalation

Further controls, supplier restrictions or tighter enforcement could affect both existing operations and new-fab expansion.

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What the expansion could mean for memory markets

NAND and SSD pricing

If the new plants eventually achieve high yields and devote substantial capacity to NAND, additional supply could weigh on NAND prices and improve sourcing options for Chinese device makers. It would not automatically make SSDs cheaper immediately: controller costs, packaging, inventory, exchange rates, demand and retailer margins also matter.

DRAM competition

A successful YMTC DRAM ramp would add a Chinese supplier to a market dominated by Samsung, SK hynix and Micron, with CXMT also pursuing domestic DRAM capability. But the timing and scale of any competitive effect depend on a qualified product, reliable yields and customer adoption.

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Supply-chain resilience

More Chinese memory capacity could reduce dependence on imported components for domestic OEMs and servers. It could also make the global supply chain more segmented if export controls limit which tools, customers or markets YMTC can serve.

How to judge future announcements

  1. Check confirmation: distinguish an official YMTC announcement or government filing from Reuters-source reporting or an analyst estimate.
  2. Identify the capacity type: ask whether a number describes planned cleanroom space, installed tools, pilot capacity or mature high-yield wafer starts.
  3. Name the memory: separate NAND from commodity DRAM, LPDDR, DDR5 and HBM.
  4. Check the generation: look for NAND layer count, TLC or QLC designation, DRAM process information, interfaces and packaging.
  5. Look for commercial evidence: sampling, customer qualification, volume shipments, pricing and reliability data are stronger signals than construction targets.
  6. Assess tooling: determine which critical equipment is domestic, which remains imported and whether the factory can sustain maintenance and process control.

Market-share figures also need a time period and methodology. A secondary report citing Counterpoint estimated YMTC at about 14% of global NAND shipments in the second quarter of 2026, while another Reuters-linked report cited 11.8% for 2025. Those figures may describe different quarters, shipment definitions or research methods and should not be treated as directly contradictory. Tom’s Hardware report on the 2026 estimate · Tom’s Hardware report on the earlier estimate

What is confirmed, reported and still unknown?

Confidence level What it supports
Confirmed by YMTC 3D NAND focus, NAND and storage products, Xtacking technology and Gen5 NAND production milestones.
Reported by Reuters Three additional Wuhan factories, approximately 100,000 wafers per month per fab at full capacity, potential total capacity near 400,000 wafers per month, and some DRAM allocation.
Secondary or analyst estimates Market-share figures and other capacity interpretations that vary by quarter and methodology.
Not publicly established Exact fab locations, equipment suppliers, DRAM node and products, final NAND/DRAM split, yields, customers, qualification schedule and commercial DRAM launch date.

The Bottom Line

YMTC is positioning itself for substantially greater memory capacity, but the DRAM element remains a reported development plan rather than a demonstrated commercial product launch. The most important milestones to watch are equipment installation, pilot yields, customer qualification and actual volume shipments—not the headline wafer capacity alone.

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