A “2 nm” chip is made using a process generation called 2 nm; the label does not mean its transistors or gates are 2 nanometers long. In IBM Research’s 2021 2 nm-node demonstration, for example, IBM reported a 12 nm gate length. That is one dimension from one research device, not a universal measurement for every 2 nm-class process.
What does “2 nm” mean in chips?
It is a process-generation label used by a manufacturer, not a literal measurement of every feature on a chip. IBM explains that recent labels such as 10 nm, 7 nm, 5 nm and 2 nm identify generations made using particular semiconductor manufacturing processes. IBM also says its 2 nm example does not correspond to the traditionally defined contacted-metal half-pitch. IBM Research’s explanation of its 2 nm-node chip is a useful illustration of the distinction.
There is no single shared physical ruler that makes every foundry’s “2 nm” label equivalent to another foundry’s. Intel has described its own naming framework, and in a 2021 corporate announcement said that traditional nanometer-based process-node naming stopped matching actual gate length in 1997. That is Intel’s characterization, not a finding from an industry standards body. Intel’s 2021 process and packaging announcement provides that company’s context.
Are 2 nm transistors actually 2 nanometers?
No—not on the evidence available here. IBM Research reported a 12 nm gate length for a transistor in its 2021 2 nm-node demonstration. The figure is larger than the node label because the label is not a gate-length specification. It should not be generalized to all 2 nm-class processes or commercial chips.
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“Transistor size” can refer to different things. A transistor has multiple physical dimensions, and chip-process comparisons may also report measures such as contacted gate pitch, minimum metal pitch, transistor density, power and performance. These are distinct quantities; a reported value for one cannot stand in for all the others.
What transistor architecture does the label describe?
The node name alone does not specify transistor architecture. IBM said its 2021 research demonstration used horizontally stacked nanosheets, with gates surrounding the channels—a gate-all-around design. IBM described the demonstration as containing 50 billion transistors in an area roughly the size of a fingernail. Both are IBM’s descriptions of that specific research chip, not measurements of every 2 nm process.
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For current production status, TSMC’s official logic-technology page says its N2 process began volume production in the fourth quarter of 2025 as planned and uses first-generation nanosheet transistors. This is a separate foundry and process from IBM’s 2021 research demonstration. TSMC’s Logic Technology page describes N2 and its status.
How should you compare 2 nm-class processes?
Compare disclosed metrics by their names and definitions, not by node labels alone. A fair comparison also needs to identify the foundry, process, source date and whether a figure describes a research demonstration, a company claim or production status.
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- Gate length: a transistor dimension. IBM’s 12 nm figure applies to its 2021 demonstration.
- Contacted gate pitch and minimum metal pitch: separate layout dimensions; neither is interchangeable with gate length.
- Transistor density: meaningful only with the stated calculation method and basis.
- Power and performance: compare only at a stated performance or power point, respectively; headline percentages without matched conditions can mislead.
The cited sources do not establish a complete set of matched physical dimensions for multiple current 2 nm-class processes. They therefore do not support a reliable numerical ranking of those processes by transistor size.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What do IBM’s performance claims show—and not show?
In its 2021 announcement, IBM said its research demonstration could deliver approximately 45% better performance at the same power, or approximately 75% lower power at the same performance, compared with “today’s 7 nm chips.” These are IBM’s reported comparison claims from 2021, not independently established guarantees for current retail products. They should not be treated as a prediction of a particular phone’s battery life or other consumer-device result.
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For a buyer, the practical takeaway is that “2 nm” alone does not tell you a device’s speed, battery life, price or value. Those depend on the complete chip and product, and should be assessed using product-specific specifications and tests rather than inferred from a process label.
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