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TechInsights’ teardown of sampled Huawei Ascend 910C accelerators found TSMC-origin logic dies and, across different samples, Samsung and SK Hynix HBM2E memory. That is important evidence that the chip is not fully domestically produced. It does not prove that TSMC, Samsung or SK Hynix currently supply Huawei directly, nor does it show that every 910C uses the same components.
The 910C is best understood as a strategically important Chinese alternative to Nvidia inside China—not a universal technical equivalent to Nvidia’s newest accelerators. Huawei can compensate for weaker individual chips with large systems such as CloudMatrix 384, but power efficiency, software maturity, production volume and high-bandwidth-memory supply remain major constraints.
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What the teardown actually found
Reporting on TechInsights’ analysis identified TSMC-manufactured logic dies inside sampled Ascend 910C units. Logic dies contain the accelerator’s processing circuitry. The same reporting said that Samsung and SK Hynix HBM2E components were found across different samples.
That wording matters. The evidence supports the following claims:
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- Multi-Precision Computing — Supports FP64 (7 TFLOPS), FP32 (14 TFLOPS), FP16 (112 TFLOPS) and INT8 precision modes for flexible deployment across training, inference, and scientific simulation workloads
- TSMC-origin silicon was found in the 910C samples examined.
- Samsung and SK Hynix HBM2E were identified in separate samples.
- The memory was an older HBM generation, rather than the newest HBM3E or HBM4.
It does not establish that every 910C contains Samsung memory, that every unit contains a TSMC die, or that the suppliers currently sell components directly to Huawei. The findings concern sampled hardware and may not describe every production batch or revision. See the Business Times summary of the TechInsights findings and CNA’s report on the sampled components.
Why TSMC and Samsung components matter
An AI accelerator is more than its main processor die. It also depends on high-bandwidth memory, advanced packaging, substrates, interconnects, testing and system integration.
| Layer | What the evidence indicates |
|---|---|
| Accelerator design | Huawei/HiSilicon’s Ascend architecture |
| Logic dies in sampled units | TSMC-origin dies identified by TechInsights |
| Other possible manufacturing route | SMIC-linked domestic production is associated with the Ascend supply chain, but the available evidence does not establish the share made by SMIC |
| HBM2E in samples | Samsung and SK Hynix components reported in different samples |
| System integration | Huawei’s Atlas and CloudMatrix platforms |
| Software | Huawei’s Ascend and CANN ecosystem |
The result is a hybrid supply-chain product: Chinese-designed and strategically controlled by Huawei, but with foreign-origin components identified in sampled hardware. Calling it “fully domestic” would therefore be too broad.
Does this mean TSMC is currently supplying Huawei?
No such conclusion follows from the teardown alone. TSMC has said it stopped supplying Huawei after September 2020. Reporting on the company’s response said the examined dies appeared to be older material, with the relevant analysis linked to October 2024 rather than recent manufacturing for Huawei.
The distinction is between component origin and current supply relationship:
- Confirmed: TSMC-origin silicon was found in sampled 910C hardware.
- Not confirmed: TSMC recently manufactured those dies for Huawei.
- Not confirmed: TSMC knowingly supplied Huawei in violation of export restrictions.
- Possible explanations: pre-restriction inventory, indirect procurement, third-party entities, or components originally made for another customer.
Similarly, Samsung-manufactured HBM2E in a sample does not prove that Samsung currently sells memory directly to Huawei. Reporting said Samsung and SK Hynix halted sales to Huawei after U.S. controls and said they remain compliant with applicable regulations. The teardown cannot by itself identify the original customer, intermediary, final recipient or date on which the memory entered Huawei’s supply chain.
How the 910C relates to the 910B
The Ascend 910C is widely described as a dual-die or chiplet-based design related to the 910B family. Some reports characterize it as combining two 910B-class dies, although the exact configuration may vary by revision and source.
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Using multiple dies can raise aggregate compute capacity, but it also creates engineering problems involving:
- die-to-die communication;
- advanced packaging yield;
- power delivery and heat dissipation;
- memory access and bandwidth;
- inter-chip synchronization; and
- software scheduling across the dies.
It is therefore misleading to describe the 910C as simply two 910B chips glued together. The package, interconnect and software have to make the combined device function as a useful accelerator.
Can the 910C replace Nvidia?
The answer depends on what “replace” means. There are at least four different tests.
1. Procurement replacement
For Chinese companies that cannot reliably obtain Nvidia’s restricted data-center accelerators, Huawei is a practical domestic option. Availability and political reliability can matter more than absolute peak performance when imported hardware is difficult to purchase, deploy or replenish.
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The 910C may be competitive in selected inference and system-scale workloads, but the available evidence does not support a blanket claim that it matches Nvidia’s latest products across training, inference, model architectures and precision levels.
Earlier reporting cited performance at about 60% of Nvidia H100 inference performance in particular testing or analysis. That figure should not be generalized to training, total cost, power efficiency or every workload. It is also not a direct comparison with every newer Nvidia product.
3. Software replacement
Nvidia’s CUDA ecosystem has years of accumulated libraries, tools, documentation and developer experience. Huawei’s CANN stack and related Ascend tools provide an alternative, but porting workloads can require code changes, operator substitutions, compiler adjustments and performance tuning.
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A chip that is theoretically capable of running a model may still be less productive if engineers must rewrite kernels, troubleshoot unsupported operators or optimize a new distributed runtime.
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This is Huawei’s strongest case. A somewhat slower accelerator that China can design, allocate and deploy domestically may be more valuable to state-owned companies, cloud providers, universities and strategic AI projects than a faster product whose availability can change with export policy.
So the 910C is a meaningful Nvidia substitute in China under supply and political constraints. It is not established as a universal one-for-one replacement for Nvidia’s newest hardware.
CloudMatrix 384: competing at the system level
Huawei’s strategy is not limited to matching Nvidia accelerator for accelerator. Huawei has described the Atlas 900 A3 SuperPoD as supporting up to 384 Ascend 910C chips. An academic paper describes CloudMatrix384 as integrating 384 Ascend 910C NPUs, 192 Kunpeng CPUs and a high-bandwidth Unified Bus network with direct all-to-all interconnection among accelerator resources. See Huawei’s system presentation and the CloudMatrix384 architecture paper.
This architecture can compensate for weaker individual accelerators through:
- a larger number of compute devices;
- dense system integration;
- high-bandwidth or optical interconnects;
- unified resource pooling; and
- cluster-level software optimization.
Third-party comparisons have claimed that CloudMatrix 384 can exceed Nvidia GB200-class systems on some aggregate measures, including total memory or system-level throughput. Those comparisons also indicate substantially higher power consumption. A Tom’s Hardware analysis characterized the advantage as coming partly from brute-force scale.
| Question | Why it matters |
|---|---|
| How many accelerators? | More chips can increase aggregate capacity, but also add networking and reliability complexity. |
| How much memory? | Total memory is useful only if software and workloads can use it efficiently. |
| What workload? | Inference, training and mixture-of-experts models can produce very different results. |
| What precision? | Peak figures are not comparable unless precision and measurement methods match. |
| What power draw? | Electricity and cooling can overwhelm a nominal throughput advantage. |
| What software stack? | Porting effort and runtime maturity affect real application throughput. |
A system-level comparison is not a chip-level parity claim. CloudMatrix 384 could outperform a competing Nvidia configuration on one aggregate metric while remaining less efficient, harder to program or more expensive to operate.
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HBM is the central production bottleneck
High-bandwidth memory is not a minor accessory. AI accelerators require large quantities of fast memory positioned close to the compute dies, and HBM production depends on specialized memory manufacturing, stacking, packaging and testing.
A company can have a working accelerator design and domestic wafer capacity yet still fail to ship at scale if it lacks enough suitable HBM. U.S. export-control rules address advanced-computing chips and HBM-related items; relevant provisions are described in BIS guidance and the Export Administration Regulations.
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Foreign HBM inventories could allow Huawei to assemble a meaningful number of 910Cs. But inventory is not a permanent manufacturing solution. Once older HBM2E stock is exhausted, China’s domestic memory capacity, yield, quality and packaging capability will determine how many accelerators Huawei can actually ship.
This is why “domestic chip” and “domestic semiconductor ecosystem” are different claims. Long-term self-sufficiency would also require reliable access to:
- HBM and other memory products;
- advanced packaging equipment and materials;
- substrates and interposers;
- manufacturing equipment;
- EDA software;
- testing and screening;
- high-speed networking; and
- compiler, runtime and application software.
How many 910Cs can Huawei produce?
Public estimates vary widely because they may refer to different years, production scenarios or definitions of output. They should not be treated as a single agreed forecast.
| Estimate | What it appears to measure | Confidence |
|---|---|---|
| 250,000–300,000 | A forecast under tighter HBM assumptions, reportedly cited in analysis connected to congressional testimony | Medium |
| About 1 million | A potential-output scenario assuming sufficient dies and memory | Medium-low |
| Several hundred thousand | Reported plans or allocations, including one forecast of roughly 200,000 for customers and 100,000 for Huawei or state-linked projects | Medium-low |
These numbers are not confirmed production totals. The key variable is not only wafer capacity. It is the combined availability and yield of logic dies, HBM, packaging and complete systems.
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The 910C should not be classified with a single yes-or-no label. A more useful description is:
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The 910C is a Huawei-designed, China-focused AI accelerator whose sampled units contained foreign-origin logic and memory components, while newer or other production routes may rely more heavily on domestic manufacturing.
SMIC is associated with Huawei’s domestic semiconductor supply chain, and some 910C-related compute dies may be produced domestically. However, the available evidence does not establish what proportion of total 910C production uses SMIC dies versus TSMC-origin dies. Nor does it show that every component in every sampled unit was fabricated in China.
The distinction matters for investors and infrastructure buyers. Huawei may control design, system integration, software direction and domestic distribution even while remaining dependent on foreign-origin inputs. That dependence affects scale and resilience, but it does not eliminate the product’s strategic value.
What happens when foreign inventories run out?
Huawei and China’s semiconductor industry have several possible paths:
- Increase domestic die production: Move more of the logic manufacturing route to SMIC or other Chinese capacity.
- Develop domestic HBM: Expand local memory production and improve yield and packaging.
- Optimize chiplet designs: Use packaging and architecture changes to obtain more system capacity from available dies.
- Target inference: Prioritize products and configurations that deliver useful serving performance without matching the newest training hardware.
- Use Nvidia where permitted: Some buyers may continue using imported accelerators if legally available and technically preferable.
- Support software migration: Government procurement and funding can encourage developers to port workloads to Huawei’s stack.
None of these paths guarantees Nvidia-level performance or cost efficiency. They do, however, show why the 910C can matter even before China achieves complete semiconductor independence.
What the 910C means for the AI-chip market
For infrastructure buyers, the relevant question is not simply whether the 910C is faster than an Nvidia accelerator. A practical evaluation should consider:
- Availability: Can the buyer obtain enough units for the intended deployment?
- HBM supply: Can Huawei sustain shipments rather than deliver a limited batch?
- Per-chip performance: What does the device deliver on the buyer’s actual models?
- Cluster scaling: Does performance continue to improve as more accelerators are added?
- Power and cooling: What are the rack’s electricity, thermal and floor-space requirements?
- Software compatibility: How much engineering is needed to move from CUDA?
- Reliability: Can the system run prolonged training or inference workloads?
- Total cost: What are the expenses for hardware, energy, networking, migration and support?
- Supply-chain resilience: Can the system be produced without TSMC, Samsung or SK Hynix inputs?
- Policy support: Are domestic procurement rules or financing reducing adoption barriers?
For investors, the central issue is therefore industrial execution rather than a single benchmark. Huawei’s opportunity grows if Chinese buyers value supply certainty and policy alignment. Its constraints remain foreign-component dependence, HBM availability, power consumption, software maturity and production scale.
Bottom line
The teardown is significant because it exposes the gap between a Chinese-designed AI accelerator and a completely self-sufficient Chinese semiconductor product. TSMC dies and Samsung or SK Hynix HBM2E in sampled 910C units show that Huawei’s current supply chain has relied, at least in those units, on foreign-origin components. They do not prove current direct supply, export-control violations or a uniform bill of materials for every 910C.
The 910C can replace Nvidia in an important practical sense: it gives Chinese organizations a domestically controlled platform when Nvidia availability is restricted or uncertain. It does not yet replace Nvidia across performance, efficiency, software or global supply scale.
CloudMatrix 384 strengthens Huawei’s case by competing through system-level scale, but aggregate throughput should not be confused with per-chip parity or better total economics. The decisive long-term test is whether Huawei can produce enough capable accelerators with domestic logic, domestic HBM and a mature software ecosystem after foreign inventories are no longer available.
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