NVIDIA designs AI chips, accelerated-computing systems and software; TSMC manufactures semiconductor wafers for customers and provides advanced packaging technologies. They are not two companies doing the same job: NVIDIA is a chip and platform designer, while TSMC is a contract manufacturer and foundry. NVIDIA relies on TSMC and other suppliers to make and prepare its products, and TSMC has also announced that it uses NVIDIA computing and AI technologies for certain semiconductor-design and fab tasks.
What is the difference between NVIDIA and TSMC?
The short version is that NVIDIA designs and supplies computing products, while TSMC makes semiconductor wafers for companies that design chips. NVIDIA’s work includes accelerated-computing chips, systems and software. TSMC’s work includes foundry manufacturing, process technology and advanced packaging services. A customer can design a chip without operating its own wafer factories; that is the manufacturing model NVIDIA describes for itself.
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That distinction matters because an AI chip is not produced by one company performing every stage. Design, wafer fabrication, memory supply, packaging, assembly and testing are distinct parts of a wider chain. NVIDIA’s filings identify suppliers and contractors across several of those stages. TSMC is a significant manufacturing partner in that chain, but NVIDIA also names Samsung as a foundry, and its disclosures identify other companies and technologies for memory, packaging and assembly-related work.
So the useful comparison is not “which company makes the better AI chip?” TSMC does not design NVIDIA GPUs, and NVIDIA does not own TSMC’s fabs. The useful question is how the companies’ different roles fit together—and what that dependence means for producing complex chips at scale.
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| Question | NVIDIA | TSMC |
|---|---|---|
| Primary role | Designs accelerated-computing chips, systems and software. | Manufactures customer-designed semiconductor wafers as a foundry; also develops process technologies and offers packaging services. |
| Manufacturing model | Describes its approach as fabless and based on contracting manufacturing partners. | Provides wafer manufacturing and related services to customers. |
| Place in the chain | Product and platform designer and supplier; depends on suppliers and contractors for manufacturing stages. | Foundry and manufacturing-services provider within customers’ supply chains. |
| Relationship to the other | Uses external manufacturing partners, including TSMC. | Manufactures wafers for customers including NVIDIA; it has also announced uses of NVIDIA technology in certain fab workloads. |
The role descriptions in this table reflect NVIDIA’s FY2026 Form 10-K and TSMC’s 2025 Annual Report. The reciprocal technology example comes from NVIDIA’s June 1, 2026 announcement and describes specific workloads, not the entirety of TSMC’s operations.
Does NVIDIA make its own AI chips?
NVIDIA designs its chips, but its disclosed manufacturing strategy is fabless: it contracts with manufacturing partners rather than making every chip in its own wafer fabs. “NVIDIA makes AI chips” can therefore be accurate in the sense that NVIDIA designs and sells them, but misleading if it suggests that the company itself runs all the factories and performs every production step.
Chip design and chip fabrication are different kinds of work. Design specifies the product’s architecture and implementation; a foundry uses its manufacturing processes to produce wafers from a customer’s design. Subsequent packaging and assembly stages prepare components for use in products. The exact responsibilities and suppliers vary across the chain, and the public company disclosures cited here do not establish that one supplier performs every step for every NVIDIA product.
NVIDIA’s FY2026 Form 10-K, for the fiscal year ended January 25, 2026, names TSMC and Samsung as wafer foundries. That is enough to show why it would be inaccurate to say TSMC alone makes every NVIDIA chip. It also makes the relationship clearer: NVIDIA is the product designer and customer; TSMC is one of the companies providing manufacturing capacity and services.
Fabless does not mean that a company has no role in manufacturing. It means the company relies on external manufacturing partners for wafer production rather than operating the full set of fabrication facilities itself. NVIDIA still has to coordinate with suppliers and contractors that support the product chain. Its FY2026 filing specifically identifies dependence on manufacturing capacity, foundries, memory sources, packaging, and assembly and testing contractors. That makes the model asset-light in the sense of factory ownership, but not independent of factories or production planning.
How an AI chip moves through the supply chain
A simplified chain, based on the supplier categories NVIDIA discloses, looks like this:
- Product and chip design: NVIDIA designs accelerated-computing products and develops associated software and platforms.
- Wafer fabrication: Foundries such as TSMC and Samsung manufacture semiconductor wafers for customers.
- Memory supply: Memory vendors provide memory used in the broader product supply chain. NVIDIA identifies SK Hynix, Micron and Samsung among its memory sources.
- Packaging: Packaging technologies integrate chips and support the interconnections needed for the product. NVIDIA identifies CoWoS as a packaging technology in its supply chain disclosures; TSMC lists it among a wider group of advanced packaging and 3D chip-stacking technologies.
- Assembly, testing and packaging services: Contractors and subcontractors handle production work beyond wafer fabrication. NVIDIA names Hon Hai, Wistron and Fabrinet as examples of companies involved in assembly, testing and packaging.
This is a simplified map, not a claim that every component follows an identical route or that each named company performs every activity. A finished computing system can involve a larger supply chain than the stages listed here. The practical point is that wafer fabrication is only one part of bringing a chip-based product to market.
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Each handoff represents a different kind of dependency. A foundry produces wafers using its process technologies; memory vendors supply a separate category of components; packaging integrates chips and supports the interconnections; and contractors may perform assembly, testing or packaging work. This is why a headline about wafer output should not automatically be read as a count of finished accelerators or complete systems. The cited company disclosures identify the categories and examples, but do not provide a single universal production path or a supplier-by-supplier bill of materials for every NVIDIA product.
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Packaging deserves particular attention because it is not another name for wafer fabrication. TSMC’s 2025 Annual Report names CoWoS, InFO, TSMC-SoIC and TSMC-COUPE as distinct advanced packaging and 3D chip-stacking technologies. The report describes these technologies as supporting large-scale interconnectivity and customer needs. They should not be treated as interchangeable labels, nor should the existence of a packaging service be taken to mean that TSMC performs every final assembly or testing task in NVIDIA’s supply chain.
The distinction is practical: a wafer is not yet a finished product, and packaging is a separate production stage with its own technologies and providers. The names CoWoS, InFO, TSMC-SoIC and TSMC-COUPE identify different offerings in TSMC’s portfolio, not four names for the same method. The information available here supports describing their role broadly, as advanced packaging and 3D stacking technologies, rather than assigning a specific one to each NVIDIA product.
Why TSMC’s manufacturing role matters
A foundry’s role is more than supplying floor space in a factory. It must offer manufacturing processes and capacity that customers can use, and TSMC’s annual report describes investment in leading-edge process technologies and advanced packaging. If a product designer depends on external foundries and other suppliers, the ability to secure future supply and capacity becomes a business consideration as well as a production concern.
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NVIDIA’s FY2026 filing says its supply chain is mainly concentrated in Asia while the company expands into the United States and Latin America. The filing identifies reliance on manufacturing capacity, foundries, memory suppliers, packaging and contractors, and discusses the risk of securing future supply and capacity. Those disclosures support a measured conclusion: NVIDIA depends on a multi-company supply chain, and geographic concentration and available capacity are relevant considerations. They do not establish a specific future shortage or quantify its effect on any particular product.
TSMC’s scale helps put its role in context, but the figures need their dates and denominators. In its 2025 Annual Report, TSMC reported total wafer shipments of 15.0 million 12-inch-equivalent wafers, compared with 12.9 million in 2024. This is total company-reported wafer shipments, not AI-only output, and the equivalent-wafer measure should not be read as a count of individual chips.
| TSMC-reported measure | 2025 figure | What it means—and what it does not |
|---|---|---|
| 3-nanometer technologies | 24% of total wafer revenue | Share of TSMC’s wafer revenue in 2025; not a share of all chips or AI chips sold worldwide. |
| Advanced technologies | 74% of total wafer revenue | TSMC defines this category as 7-nanometer and more advanced technologies. |
| Total wafer shipments | 15.0 million 12-inch-equivalent wafers | TSMC’s company-reported total for 2025, versus 12.9 million in 2024; not AI-only production. |
| Foundry 2.0 industry growth | 16% year over year | TSMC’s estimate in its 2025 Annual Report shareholder letter, not an independently verified market statistic. |
| Revenue growth | 35.9% year over year in U.S. dollar terms | TSMC’s company-reported revenue growth in the shareholder letter; it is not a measure of wafer output. |
Each figure answers a different question. Revenue mix indicates how much of TSMC’s wafer revenue came from specified technology categories; shipment volume indicates total wafer shipments using a stated equivalent size; revenue growth describes financial performance; and the Foundry 2.0 figure is the company’s estimate of industry growth. None of those figures alone measures the number of AI accelerators made for NVIDIA.
The denominators matter when comparing these numbers. The 24% and 74% figures are portions of TSMC’s wafer revenue, not percentages of the total wafers it shipped. The 15.0 million figure counts 12-inch-equivalent wafer shipments, not individual dies, packaged chips or systems. The 16% Foundry 2.0 growth figure is TSMC’s estimate of industry growth, while the 35.9% figure is TSMC’s own revenue growth in U.S. dollar terms. Treating those as equivalent indicators would blur industry estimates, company results and production measures.
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TSMC’s capacity planning and investment in leading-edge and packaging technologies help explain why its role is strategically relevant to customers. But scale does not mean the foundry controls every factor in a customer’s delivery schedule. NVIDIA’s own disclosures point to other dependencies too, including memory suppliers and contractors for packaging, assembly and testing. A reader assessing the chain should therefore distinguish the foundry’s wafer manufacturing role from the separate capacity and coordination questions across suppliers.
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What TSMC’s process milestones say about its position
TSMC reported that its 2-nanometer technology entered high-volume manufacturing in the fourth quarter of 2025. Its annual report anticipated a fast ramp in 2026. These are two different statements: entry into high-volume manufacturing is a reported milestone; the ramp is an expectation stated in the report, not a guarantee of a later production level.
Process-node names are useful markers for understanding a foundry’s technology roadmap, but they are not a simple measure of the size of a chip or a direct count of how many chips a factory can produce. For this comparison, the sourced, concrete points are TSMC’s reported revenue shares for its 3-nanometer and broader advanced-technology categories, plus the dated 2-nanometer manufacturing milestone. They establish aspects of TSMC’s manufacturing position; they do not show that every NVIDIA product uses a particular process.
It is also useful to separate a technology milestone from a customer-specific production claim. TSMC’s report says its 2-nanometer technology entered high-volume manufacturing in 4Q 2025, but that statement alone does not identify which products use it, how much of the capacity any customer receives, or how many finished chips result. Similarly, TSMC’s expectation of a fast ramp during 2026 is a forward-looking statement from the annual report. It should not be converted into a guaranteed output figure.
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These dates also show why it helps to label a figure with its reporting period. The first Arizona fab’s high-volume manufacturing start is described as an event in 4Q 2024; the second Arizona fab date is an expectation for the second half of 2027 in TSMC’s 2025 report. Neither detail changes the basic division of labor: NVIDIA designs and sells products, and TSMC supplies foundry manufacturing and related services to customers.
How the relationship works in both directions
The core commercial relationship runs from NVIDIA as a chip designer and customer to TSMC as one of its foundries. But the companies’ technologies can also meet in the other direction: TSMC has said it uses NVIDIA computing and AI technology in parts of semiconductor design and fab operations.
In a June 1, 2026 announcement, NVIDIA described TSMC workloads involving computational lithography, transistor, equipment and process simulation, advanced process control, fab scheduling, and vision-AI defect inspection. NVIDIA founder and CEO Jensen Huang said: “TSMC is bringing NVIDIA AI and accelerated computing into the fab itself, tackling some of the world’s most complex design and manufacturing challenges with simulation, optimization and AI to improve speed, efficiency and yield for the next generation of chips.”
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The described uses cover different kinds of fab work: computational lithography is part of the design-and-manufacturing workflow; simulation models transistor, equipment and process behavior; advanced process control and scheduling relate to managing production; and vision-AI inspection is used to identify defects. NVIDIA also said CUDA-X libraries and AI models are involved in these workloads. That detail makes the relationship reciprocal in a concrete but limited way: NVIDIA is a foundry customer, while NVIDIA technologies are also described as tools used in selected TSMC tasks.
NVIDIA also cited performance claims for particular tools in the announcement: it said cuLitho could improve cost effectiveness or cycle time by 20–50% versus CPU-based computational lithography, and that cuEST delivered average chemistry simulations 50 times faster. These are NVIDIA’s claims about specific workloads and comparisons, not independently audited, TSMC-wide results. They should not be read as a general productivity multiplier for chip manufacturing.
The comparison baseline and scope matter for these numbers. The 20–50% figure refers to cost effectiveness or cycle time for cuLitho compared with CPU-based computational lithography; the 50-times figure refers to average chemistry simulation speed for cuEST. They do not say that overall fab output, yield or delivery speed improves by those amounts. Because NVIDIA made the claims in its June 2026 announcement, attribution should stay attached whenever the figures are repeated.
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For a business or investor trying to understand headlines about AI-chip demand, the distinction helps identify which part of the chain is being discussed. A company designing a high-demand product still depends on the ability of foundries and other suppliers to manufacture and prepare it. A foundry’s process capabilities and capacity matter to customers, but the foundry is not thereby the designer or owner of every customer product.
- When the headline concerns a new chip or computing platform, it usually points to the designer’s product and software decisions, not necessarily to the company operating the manufacturing fab.
- When it concerns foundry capacity or process technology, it concerns the manufacturing side of the chain. It should not be confused with the number of finished AI systems available.
- When it concerns packaging, memory or assembly, it refers to additional dependencies between wafer production and a final product.
- When it quotes a company’s performance claim, check who made the claim, which workload it covers and whether it is independently verified. The June 2026 NVIDIA announcement’s figures are NVIDIA claims about specified tools and tasks.
This framework also avoids two common errors: treating the chip designer and foundry as interchangeable competitors, and attributing the entire finished-product supply chain to a single supplier. NVIDIA’s own disclosures describe multiple suppliers and stages. TSMC is an important part of the manufacturing picture, but it is not the whole picture.
For anyone comparing company roles, the cleanest test is to ask what activity a headline is describing. If the subject is architecture, computing products or software platforms, NVIDIA is acting in its designer-and-supplier role. If the subject is wafer manufacturing, process technology or foundry services, the focus is TSMC’s manufacturing role. If the subject is packaging or final assembly, the answer may involve another distinct stage or supplier. These are connected activities, but they are not interchangeable descriptions of one company doing all the work.
Geographic concentration and capacity dependence are relevant context, especially because NVIDIA says its supply chain is mainly concentrated in Asia while it expands into the United States and Latin America. That disclosure describes a supply-chain consideration; it does not by itself establish a future bottleneck, the impact on a specific product, or a particular delivery outcome. The same care applies to TSMC’s annual-report plans and technology milestones: they indicate what the company reported or expected at that time, not an automatic forecast of customer supply.
Sources and reporting scope
The role and supplier descriptions above draw on NVIDIA’s FY2026 Form 10-K for the fiscal year ended January 25, 2026, NVIDIA’s FY2025 Sustainability Report, TSMC’s 2025 Annual Report, and NVIDIA’s June 1, 2026 announcement, “NVIDIA and TSMC Bring AI Into Fabs to Advance Semiconductor Design and Manufacturing.” Figures, roadmaps, supplier lists and performance statements are attributed to the companies that reported them; they are not presented as independent measurements.
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Frequently Asked Questions
What’s the difference between NVIDIA and TSMC?
NVIDIA designs accelerated-computing chips, systems and software. TSMC is a foundry that manufactures wafers for customers and offers process technologies and advanced packaging services. They occupy different roles in the same broader supply chain.
Does NVIDIA make its own AI chips?
NVIDIA designs and sells its chips, but it describes its manufacturing approach as fabless and based on contracting manufacturing partners. Its FY2026 Form 10-K names TSMC and Samsung as wafer foundries.
Does TSMC make every NVIDIA chip?
NVIDIA names both TSMC and Samsung as wafer foundries, so its disclosures do not support saying TSMC alone makes every NVIDIA chip. NVIDIA also identifies separate memory suppliers and packaging, assembly and testing contractors.
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Repair common Windows errors and clear accumulated junk for a smoother, more stable PC - no reinstall needed.Free scan · no reinstallDoes NVIDIA own TSMC fabs, or does TSMC design NVIDIA GPUs?
No. The disclosures describe NVIDIA as a customer and product designer and TSMC as a foundry and manufacturing-services provider. They do not describe NVIDIA as owning TSMC fabs or TSMC as designing NVIDIA GPUs.
What does fabless mean in this comparison?
It means NVIDIA contracts with manufacturing partners for wafer fabrication rather than operating its own full set of wafer fabs. It still depends on coordination across foundries, memory vendors, packaging, assembly and testing suppliers.
What is the difference between wafer fabrication and packaging?
Wafer fabrication is the foundry’s manufacturing of semiconductor wafers from customer designs. Packaging is a later, distinct stage that integrates chips and supports needed interconnections. TSMC lists CoWoS, InFO, TSMC-SoIC and TSMC-COUPE as distinct advanced packaging and 3D chip-stacking technologies.
Does TSMC use NVIDIA technology?
NVIDIA’s June 1, 2026 announcement described TSMC uses of NVIDIA GPUs, CUDA-X libraries and AI models in certain design and fab workloads, including computational lithography, simulation, process control, scheduling and defect inspection. The announcement describes specific applications, not universal use across all TSMC operations.
The Bottom Line
Bottom line: NVIDIA designs and supplies AI computing products; TSMC manufactures wafers and offers process and packaging services for customers. NVIDIA relies on TSMC and other suppliers, while TSMC has also described using NVIDIA technology in selected fab workloads. The companies are connected, but they do different jobs—and neither company’s role accounts for every stage of the AI chip supply chain.
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