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Why Tabula Shut Down on March 24, 2015—and What Happened to Its 3D FPGA

Tabula’s 3D Spacetime FPGA architecture aimed to shorten interconnects, but the startup was reported to close on March 24, 2015. Here’s what is known about its technology, funding and shutdown.
From TheFinanceBase Team3 min to read
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Tabula, a Santa Clara semiconductor startup, was reported to close on March 24, 2015, after developing its ABAX and ABAX2 programmable-logic chips. Its approach—reusing logic over time in a so-called 3D Spacetime architecture—was technically distinctive, but contemporary reporting pointed to limited market impact, difficult market timing and the complexity of the design as possible reasons it did not become a durable business. No formal company post-mortem establishing one definitive cause has been identified.

Did Tabula really close on March 24, 2015?

Yes. The January 30, 2015 EE Times report said the company was rumored to be closing on March 24, citing employee confirmation reported by SemiWiki. On February 11, the Silicon Valley Business Journal reported that a state filing set March 24 as the closure date. That filing is stronger confirmation than the earlier rumor, though the available accounts do not provide a detailed account of the shutdown process.

Why did Tabula shut down?

There is no identified Tabula-authored post-mortem that names a single cause. The best contemporaneous explanation is analyst commentary, not a definitive company explanation. Jim McGregor, founder and principal analyst of Tirias Research, told EE Times that Tabula had not made a significant market impact and that promising technology startups can fail because of timing or market dynamics. The article also raised the technical complexity of continuously reconfiguring a standard synthesis flow at very high speeds as a possible challenge.

Those points are plausible contributing factors, not proof of the precise reason investors or management decided to close. The company had raised more than $200 million, according to the 2015 reporting, but substantial funding alone does not establish customer adoption, recurring revenue or commercial success.

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What was Tabula’s 3D FPGA?

Tabula called its devices 3D programmable-logic devices, or 3PLDs. Its Spacetime architecture treated time as an additional design dimension: rather than dedicating all logic and interconnect to one set of operations at once, the chip reused resources across time. EE Times described a 12-level FPGA structure intended to shorten interconnects. Tabula marketed the resulting ABAX2 family as general-purpose 3PLDs.

The intended benefit was to address a central FPGA design challenge: moving signals across a chip can add delay and consume resources. Shorter interconnects can help, but the architecture’s time-based reuse also required the software and device to coordinate work across successive time slots. The cited reporting describes the design’s goal; it does not provide independent comparative benchmarks demonstrating that Tabula outperformed conventional FPGAs in particular workloads.

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What were ABAX2 and Stylus?

ABAX2 was Tabula’s later 3PLD product family. A 2014 EDN product announcement described ABAX2 development systems, including an ABAX2P1 device on a development board, Tabula’s Stylus software, an RTL reference design and testbenches, documentation and training, and soft IP libraries. The same announcement discussed solutions for 100G applications, reflecting the company’s intended communications-infrastructure market rather than proof of widespread deployment.

For designers, the front end of the workflow looked familiar: describe hardware in Verilog or VHDL, then use Stylus for compilation and place-and-route. The unfamiliar part was making a standard synthesis workflow support dynamic, continuous, high-speed reconfiguration. EE Times characterized that implementation as complex. Familiar input languages could ease design entry, but they did not by themselves make the architecture or tool chain interchangeable with a conventional FPGA.

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How much money did Tabula raise?

Contemporary EE Times and Silicon Valley Business Journal reports put Tabula’s total funding above $200 million. Separately, the company announced a $108 million Series D financing on March 28, 2011, led by Crosslink Capital and DAG Ventures. Tabula said the round would support ABAX production, customer and partner support, and next-generation development.

In that 2011 announcement, Tabula said it was targeting communications infrastructure and named Cisco Systems and other Tier 1 OEMs among customers. These statements describe the company’s position at the time; they should not be read as evidence that those organizations remained customers or that products continued to be supported after the 2015 closure.

Tabula timeline

  • 2008: Tabula was founded, according to EE Times.
  • March 28, 2011: The company announced a $108 million Series D round and described its 40nm ABAX family and Stylus software.
  • 2014: EDN covered ABAX2 development systems and Tabula’s 100G solutions.
  • January 30, 2015: EE Times published its report that Tabula was set for a March shutdown.
  • February 11, 2015: Silicon Valley Business Journal reported a state filing that set March 24 as the closure date.
  • March 24, 2015: The reported shutdown date.
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What happened to Tabula’s technology?

The available sources establish that Tabula’s ABAX/ABAX2 devices, Stylus tools and development systems were company-specific offerings. They do not establish a successor vendor, continuing product sales, ongoing software support or a transfer of the technology. As a result, Tabula’s products are best understood as a historical FPGA alternative, not as a currently supported option a designer can assume is available.

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