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What Happened to China’s Two “Ready” DRAM Fabs? The 2018 Forecast and the 2026 Reality

In 2018, two Chinese DRAM fabs were described as ready. One helped lead to CXMT; the other’s production path is less certain. Here’s what capacity estimates reveal—and what they cannot prove.
From TheFinanceBase Team9 min to read
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The April 25, 2018 headline “Chinese DRAM Industry Spreading Its Wings: Two More DRAM Fabs Ready” described two projects approaching production—not two fabs already shipping memory at scale. One project, Innotron in Hefei, became part of the story of CXMT, now China’s principal indigenous DRAM maker. The other, JHICC in Fujian, did not follow a simple, uninterrupted path from construction to major commercial output. By 2026, China has a more substantial DRAM industry, but projected wafer capacity is not proof of competitive yields, low costs, or market parity.

What the 2018 headline meant by “ready”

The original AnandTech report, published April 25, 2018, said construction was substantially complete at two 300-mm fabs and that equipment installation or production preparation was under way. It described expected trial or volume-production timetables, not demonstrated high-volume commercial output. AnandTech’s 2018 report is therefore best read as a snapshot of China’s ambitions and factory build-outs at the time.

Semiconductor manufacturing has several distinct milestones: constructing a cleanroom, installing and qualifying tools, running test wafers, improving yields, qualifying products with customers, and shipping reliable product in volume. Reaching one milestone does not guarantee the next. A completed fab shell is not the same thing as a productive, commercially competitive DRAM operation.

The two projects named in the report

JHICC: a Fujian fab with an uncertain production path

Fujian Jin Hua Integrated Circuit (JHICC) was building a 300-mm fab in Jinjiang, Fujian. The 2018 report said construction had been completed in November 2017 and equipment installation was under way, with volume DRAM production expected in the third quarter of 2018. It reported a first-phase investment of about $5.65 billion and an expected total investment of about $8 billion. Those were figures and plans reported in 2018, not proof that the expected production ramp took place.

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The report also described a partnership with Taiwan’s UMC for 22-nm DRAM process development. It said the product plan was not yet clear, including whether JHICC would prioritize LPDDR4. Its construction status and timetable should not be mistaken for evidence of sustained qualified output. Later capacity models again place JHICC among potential Chinese DRAM producers, but those projections do not establish that its 2018 production target became a stable commercial business.

Innotron: the Hefei project that leads to CXMT

The same report said Innotron Memory had completed construction of a 300-mm fab in Hefei in January 2018 and was moving equipment into the facility. It planned late-2018 trial production of 8-Gb DDR4 chips, volume production in early 2019, and an initial target of about 20,000 wafer starts per month. A second phase and a future 17-nm process-development target were also discussed. These were plans, not confirmed later capacity or output.

Current coverage centers on ChangXin Memory Technologies (CXMT), the DRAM company based in Hefei. The 2018 report used the name Innotron; the available official corporate history confirms CXMT’s Hefei development but does not reproduce every former corporate name used in contemporary reporting. It is safest to describe Innotron as associated with the Hefei effort that became the CXMT story, rather than assert a simple legal name change.

Why factory completion was only the beginning

DRAM production depends on more than the physical plant. A manufacturer must get process equipment working together, make dies at acceptable yields, test and package them, and demonstrate that products meet customer requirements. Capacity announcements usually describe wafer starts, not how many good memory bits can be sold. The usable output depends on factors including process generation, die size, yield, product mix, and packaging and test capacity.

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Commercial competitiveness adds another layer: customers need compatible products, dependable supply, reliability evidence, and qualification for their systems. Server and automotive applications, for example, have different validation and support demands from commodity PC memory. The gap between an announced production date and a durable supplier can therefore be measured in years of yield learning and customer qualification.

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How China’s DRAM effort changed after 2018

CXMT’s official timeline provides a clearer account of the Hefei project’s progress. The company says it was founded in 2016; construction of Hefei Fab A began in March 2017, and Fab A1 was completed in January 2018. CXMT records an 8-Gb DDR4 tape-out in July 2018, successful product testing in May 2019, a mass-production announcement in September 2019, and its first customer order and product sales in November 2019. It says Beijing Fab C1 began trial production in January 2022 and Hefei Fab A2 was completed in June 2022. These are company-reported milestones, documented in its official history.

The sequence shows a real outcome—but not the instant ramp implied by reading “ready” as “already producing at scale.” The Hefei effort took additional development and qualification steps before CXMT announced mass production and recorded first sales. In 2026, the more consequential questions are how quickly CXMT can scale, improve yields, compete on cost, and win customers for newer products.

Newer products are evidence of progress, not proof of parity

CXMT describes itself as a vertically integrated DRAM company serving mobile, PC, tablet, server, and other markets. Its newsroom lists an LPDDR5 product-line announcement in November 2023, an LPDDR5X mass-production announcement dated October 28, 2025, and DDR5 and LPDDR5X demonstrations at IC China in November 2025. Those company announcements show a product portfolio moving beyond the 8-Gb DDR4 focus of 2018. A product announcement or trade-show demonstration alone does not establish broad shipment, global customer penetration, or parity with Samsung, SK hynix, and Micron in cost, yield, reliability, or server qualification. See the CXMT newsroom for the dated announcements.

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JHICC’s later prospects remain a separate question

A 2026 capacity model discussed in Tom’s Hardware reporting includes JHICC among possible future Chinese DRAM producers, with an initial 60,000-wafer-starts-per-month phase and longer-term cleanroom capacity modeled at 120,000. The report discusses planned equipment activity, not verified full-rate, qualified production. Equipment arrival, if it occurs, would still be only one step in a production ramp. The 2018 JHICC timetable should not be treated as an uninterrupted success story.

What 2026 capacity estimates do—and do not—show

One analyst model cited by Tom’s Hardware projects CXMT at approximately 350,000 wafer starts per month by the end of 2026, near Micron’s modeled capacity. It also models Swaysure at about 140,000 WSPM and YMTC/XMC at about 50,000 WSPM of DRAM capacity, and puts potential Chinese DRAM capacity at about 600,000 WSPM in the coming years, excluding Samsung and SK hynix facilities located in China. The same model projects CXMT could reach roughly 950,000 WSPM by 2030. These are forecasts and supply-chain estimates, not audited production figures or confirmed good-wafer output. The estimates and their assumptions are summarized in Tom’s Hardware’s capacity report.

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Company or group Reported or modeled figure What the figure means
CXMT About 350,000 WSPM by the end of 2026; roughly 950,000 WSPM in a 2030 projection Analyst-model capacity estimates, not confirmed shipments or output.
JHICC 60,000 WSPM initial phase; 120,000 WSPM longer-term capacity Reported planned or modeled capacity, not verified production.
Swaysure About 140,000 WSPM Analyst-model estimate; the figure does not establish qualified commercial output.
YMTC/XMC About 50,000 WSPM of DRAM Analyst-model estimate, not evidence of a mature DRAM business.

Wafer starts per month cannot be translated directly into market share, bits shipped, revenue, or usable server modules. Those outcomes depend on good-die yield, how many bits fit on each wafer, product mix, qualification, and packaging. Market-share estimates can also differ depending on whether they count revenue, bits, shipments, or capacity. The central point is that a large modeled factory footprint signals potential scale; it does not by itself prove global competitiveness.

How to judge whether China is a serious DRAM competitor

Capacity is one indicator, but a fuller assessment asks whether products can be made efficiently, qualified by customers, and supplied reliably. CXMT’s DDR5 cost position is one warning against equating expansion with parity: a 2026 report citing SemiAnalysis estimates its DDR5 cost per bit is more than 30% above Samsung, SK hynix, and Micron. The same report estimates CXMT will add around 85,000 monthly DRAM wafer starts during 2026. These are attributed estimates, not audited company disclosures. Tom’s Hardware’s report on CXMT’s expansion and cost position discusses them.

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  • Technology generation: DDR4 establishes manufacturing capability; DDR5 and LPDDR5/5X are evidence of movement into newer product categories. HBM requires separate evidence.
  • Yield and cost: Compare cost per usable bit rather than nominal wafer capacity. A higher-cost supplier may still serve protected or strategically important domestic demand, but it faces a harder case in global competition.
  • Customer qualification: Named customer adoption and qualified volume shipments are stronger evidence than a product announcement or demonstration.
  • Product breadth: Mobile, PC, server, automotive, and HBM products have different design, validation, reliability, and support requirements.
  • Equipment and process control: Restrictions on access to advanced lithography and other equipment can affect process development and ramp speed. The effect depends on the specific item, technology, entity, and transaction.
  • Reliability and commercial support: Enterprise and automotive buyers expect validation, traceability, sustained supply, and long product lifecycles.

DRAM, NAND, and HBM are not interchangeable

Memory type What it is used for What the China story establishes
DDR4 and DDR5 DRAM System memory in PCs and servers CXMT’s history records DDR4 sales; its newsroom reports DDR5 demonstrations. These milestones do not alone establish global server-market parity.
LPDDR Low-power memory used in mobile and thin devices CXMT lists LPDDR5 and LPDDR5X product announcements; announcement scope is not the same as broad market shipment.
NAND flash Nonvolatile storage in SSDs, phones, and other devices YMTC is primarily associated with NAND. NAND capacity is not DRAM capacity and does not prove DRAM capability.
HBM High-bandwidth memory stacked and packaged for accelerators and other demanding systems The cited 2026 report says CXMT’s expansion is focused mainly on conventional DRAM and identifies no HBM project in its IPO prospectus. Conventional DRAM growth should not be read as HBM leadership.

YMTC’s established identity is primarily as a NAND producer, though 2026 reporting says it has sampled low-power DRAM, may allocate a substantial portion of Wuhan Phase 3 to DRAM, and is exploring through-silicon-via packaging for HBM. Those reports indicate development and plans, not an established mainstream DRAM supplier. Its reported Wuhan expansion is covered by Tom’s Hardware. A move from NAND into DRAM involves different product architectures, process expertise, and customer qualification; the categories should not be conflated.

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Ownership matters when counting China’s memory capacity

Chinese-owned DRAM production is not the same as foreign-owned fabs located in China. Samsung and SK hynix have operated semiconductor facilities in China, but their presence there does not establish indigenous Chinese DRAM technology or ownership. Likewise, a facility list or a reported wafer-capacity estimate does not by itself show that a fab is producing qualified DRAM. The distinction matters when evaluating supply security, domestic industrial capability, and who controls the technology and output.

China’s broader memory ecosystem includes CXMT in Hefei, YMTC/XMC in Wuhan, and JHICC in Jinjiang, but those sites and companies are not at the same stage or focused on identical products. A location overview is available in this CMBI report.

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What expansion could mean for buyers and the global market

A larger Chinese DRAM base could give domestic PC, smartphone, server, and electronics manufacturers another source of memory and reduce reliance on overseas suppliers for some products. That may matter even before Chinese producers match the leaders on cost: local demand and state-backed procurement can help a supplier gain manufacturing experience and customer footholds.

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For the global market, substantial new output could add competitive pressure in commodity DRAM and contribute to more fragmented sourcing. But the effect depends on actual qualified bits reaching customers, not cleanroom capacity alone. Higher costs, uneven yields, equipment constraints, and customer qualification requirements could limit how quickly projected capacity becomes a global supply alternative. No single capacity forecast establishes self-sufficiency or predicts a particular price outcome.

Export controls are part of this constraint picture. U.S. licensing rules can apply to certain advanced-node DRAM fabs and equipment transactions, but applicability depends on the item’s origin and technology, the entities involved, and the transaction. The cited U.S. House hearing document provides context; it is not a substitute for transaction-specific legal analysis.

Where the 2018 forecast stands

The headline correctly captured the direction of travel: China was trying to build a domestic DRAM industry, and the Hefei effort ultimately developed into CXMT, a significant indigenous manufacturer with documented DDR4 sales and later DDR5 and LPDDR milestones. But “ready” did not mean that both projects were already operating at scale, and JHICC’s announced 2018 timetable is not evidence of a continuous path to mature production. By 2026, China’s DRAM expansion is more than a fab-construction story; whether it becomes a durable global competitive force depends on yields, cost per bit, qualified shipments, product breadth, and reliable execution—not projected wafer starts alone.

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