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1Scan for outdated or missing drivers - takes under a minute2Clear out junk files and repair common Windows errors3Fix the driver behind crashes, sound loss and screen glitchesShort answer: China may have crossed the prototype-EUV threshold, but it has not demonstrated a production-ready rival to ASML. Reuters reported that a team in Shenzhen completed an experimental extreme ultraviolet (EUV) lithography system in early 2025 and is testing it, with a reported goal of producing working chips around 2028–2030. No public evidence yet shows that the system can manufacture commercial wafers, match ASML’s throughput and yield, or operate as a high-volume production tool.
China’s more immediate progress appears to be in domestically made immersion deep ultraviolet (DUV) equipment. That distinction matters for anyone assessing semiconductor capacity, technology restrictions or the long-term competitive position of ASML.
What the reports actually establish
A Reuters investigation published in December 2025 said China had built an EUV prototype in a secure Shenzhen facility. The report attributed details to people familiar with the project, saying the system was completed in early 2025, former ASML engineers were involved, and Huawei was helping coordinate companies, engineers and research institutes. The reported objective was to obtain working chips from the machine around 2028, with some estimates extending to 2030.
Those are significant developments, but they remain reported claims rather than a public, independently inspected demonstration. The reporting does not disclose a wafer lot, resolution measurement, overlay result, throughput figure or customer qualification. A separate summary from The Information likewise described the system as a prototype rather than a production scanner.
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The evidence therefore supports this wording: China reportedly has an EUV prototype under test. It does not support saying China already has a commercial ASML equivalent.
Source: Reuters report republished by Investing.com.
What EUV lithography does
EUV uses light with a 13.5-nanometer wavelength to project extremely small patterns onto semiconductor wafers. ASML’s current low-NA EUV systems use a 0.33 numerical aperture (NA), while its next-generation EXE High-NA platform uses 0.55 NA and is designed for future leading-edge logic, including 2-nanometer-class applications.
| System or technology | Published figure | Qualification |
|---|---|---|
| Low-NA EUV | 13.5 nm wavelength; 0.33 NA | ASML NXE:3600D specifications |
| High-NA EUV | 0.55 NA; 8 nm stated resolution | ASML EXE:5000 product specification |
Sources: ASML NXE:3600D and ASML EXE:5000.
EUV is not simply a stronger DUV lamp. A scanner must combine a laser-produced tin plasma, a vacuum chamber, reflective multilayer mirrors, high-speed wafer and reticle stages, alignment and control software, masks, photoresist, metrology and defect management. ASML says its mirrors contain more than 100 engineered layers and require exceptionally smooth surfaces because EUV is absorbed by most materials.
Source: ASML explanation of lenses and mirrors.
Why a prototype is far from a commercial scanner
Light-source power and stability
A laboratory source can generate EUV radiation without delivering the stable, high-power output required for economical wafer production. Source power, debris control and consistency determine how quickly wafers can be exposed and how often the tool must be serviced.
Mirrors, vacuum and contamination
EUV optics work through multilayer reflection inside a high vacuum. Small surface defects, tin contamination or degradation of a mirror can reduce imaging quality and yield. Building one optical column is different from keeping many columns within specification for years.
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Stage accuracy and overlay
Every chip has many patterned layers. The scanner must align each layer while compensating for heat, vibration and mechanical distortion. A usable result requires repeatable overlay, not merely a sharp single exposure.
Throughput, uptime and service
Fab economics depend on wafers per hour, availability, maintenance intervals and recovery time after faults. ASML said it planned to produce at least 60 low-NA EUV systems in 2026 while continuing productivity and service improvements. That industrial cadence illustrates the difference between a prototype and a mature platform.
Source: ASML Q1 2026 investor-call transcript.
Process integration and yield
The scanner is only one part of a manufacturing line. A production process also needs suitable resist, masks and pellicles, inspection and metrology, etch and deposition tools, process-control software, design rules and trained service teams. A machine can expose a test wafer yet remain uneconomic if defects or corrective steps destroy yield.
China’s DUV progress is the nearer-term story
DUV and EUV are different technology categories. China has used imported DUV tools and multiple-patterning techniques to make some advanced chips. Multiple patterning can reduce the feature size formed in each exposure, but it adds lithography and etch steps, cycle time, cost and opportunities for overlay error.
In July 2026, Reuters reported that China had begun manufacturing domestically developed immersion DUV machines, with initial deliveries reportedly intended for SMIC, Hua Hong Semiconductor and ChangXin Memory Technologies. Another Reuters account said people familiar with the matter expected roughly five domestic immersion DUV tools in 2026 and about 20 in 2027. These are reported plans, not confirmed official production guidance.
Sources: Reuters report republished by Euronext and Reuters-linked DUV production report.
| Program | Current evidence | What it does not prove |
|---|---|---|
| Domestic immersion DUV | Reported manufacturing and planned customer deliveries in 2026 | That China has a production EUV scanner |
| Domestic EUV | Reported Shenzhen prototype, testing and a 2028–2030 working-chip objective | Commercial wafers, high throughput or ASML-level yield |
| ASML EUV | Commercial NXE systems, High-NA EXE development, installed customers and service infrastructure | That every EUV component is made by ASML itself |
Can China make advanced chips without EUV?
Yes, to a degree. DUV-based multiple patterning and process optimization can produce some chips marketed at advanced nodes. It is misleading to say that a “5-nanometer chip” automatically proves 5-nanometer single-exposure EUV capability: node names describe a broader process generation, not one exposure measurement.
Without EUV, manufacturers generally face more patterning steps, lower effective throughput, higher costs, tighter overlay budgets and additional yield pressure. That can be workable for selected products but harder to scale economically across large volumes.
The Center for Strategic and International Studies has described SMIC and Huawei’s efforts to produce advanced-node chips without EUV. Those analyses provide historical context; later reports of a Chinese prototype update the picture but do not establish commercial EUV production.
Sources: CSIS analysis of Huawei, DeepSeek and export controls and CSIS analysis of China’s semiconductor localization drive.
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One free scan finds every outdated or missing driver and matches the right update for your exact hardware.Free scan · exact hardware matchWhy China is pursuing domestic lithography
China’s effort reflects both a long-running semiconductor-independence strategy and heightened pressure from export controls. U.S. rules cover advanced semiconductor manufacturing equipment and related technologies, while Dutch licensing restrictions limit some ASML shipments to China. Huawei and SMIC also have incentives to secure domestic capacity for logic and AI chips.
The controls increased the urgency and political priority of domestic equipment development, but it would be too simple to say they alone caused the program. China had already been investing in local semiconductor tools, materials and manufacturing.
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Relevant U.S. rules and announcements include the Bureau of Industry and Security advanced-semiconductor controls, the foreign-owned-fab rule changes and Export Administration Regulations Part 744. Export rules can change by product, end user, country, licensing policy and servicing activity.
Where ASML stands today
ASML remains the established commercial supplier of EUV lithography systems. Its portfolio spans 0.33-NA NXE low-NA EUV, 0.55-NA EXE High-NA EUV, DUV scanners, metrology, inspection and computational-lithography products.
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ASML says its first EUV production system shipped in 2013. It reported revenue recognition on 48 EUV systems in 2025 and €11.6 billion in EUV system sales for that year.
Source: ASML EUV overview and ASML 2025 results presentation.
The meaningful comparison is not one Chinese machine against one ASML machine. It is a reported prototype versus decades of ASML engineering, supplier relationships, production learning, installed tools, process data, software and field service. ASML is also advancing its own 0.55-NA roadmap rather than standing still.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How to tell when “rival to ASML” becomes justified
Public evidence would need to answer most of these questions:
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- Functional exposure: Has the tool printed repeatable patterns on production-relevant wafers?
- Resolution and overlay: What minimum feature and layer-to-layer alignment results were measured?
- Throughput: How many wafers per hour does it deliver under stated conditions?
- Availability: Can it run continuously in a fab, including scheduled and unscheduled maintenance?
- Yield: What proportion of chips meets specifications after the full process?
- Ecosystem: Are masks, pellicles, resist, metrology, inspection and process software qualified?
- Scale: How many systems can be built annually, at what cost?
- Customer use: Is a major fab using the tool for production rather than evaluation?
- Service: Can the supplier maintain, repair and upgrade an installed base?
- Node relevance: Is the system suitable for mature-node, 7-nanometer-class, 5-nanometer-class or 2-nanometer-class production?
Until those metrics are public, “reported EUV prototype” is the accurate description.
Three ways the story could develop
Optimistic scenario
China demonstrates working chips from the prototype near the reported 2028 target, then improves source power, overlay and materials through successive generations. That would be an important technology milestone, but early tools could still lag ASML on cost, uptime and volume.
Base-case scenario
Domestic DUV expands first while the EUV program advances through incremental engineering, with commercial deployment taking longer than the headline timetable. China gains equipment resilience without immediately displacing ASML.
Pessimistic scenario
The prototype continues to show basic functionality but stalls on source power, mirror quality, contamination, yield, software or supply-chain constraints, preventing reliable fab deployment.
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What this means for technology and investment readers
A Chinese EUV prototype would matter strategically even before it became a commercial product: it could reduce dependence on restricted imports, improve domestic engineering capability and change expectations about the durability of equipment controls. But a prototype milestone alone does not establish a change in ASML’s revenue position, customer base or competitive moat. Any investment conclusion would require separate analysis of ASML demand, export-policy changes, semiconductor capital spending and China’s actual production metrics.
The Bottom Line
Bottom line: China may be close to demonstrating a domestic EUV prototype milestone, but the available evidence does not show an ASML-equivalent production machine. Domestic immersion DUV appears closer to deployment; EUV remains a demanding, multi-year industrialization project. The headline becomes defensible only when China publishes sustained results for resolution, overlay, throughput, uptime, yield, customer production and manufacturing scale.
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