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A semiconductor fab, short for fabrication facility, is the specialized factory where circuits are built on silicon wafers. It uses repeated cycles of adding or changing materials, patterning selected areas, removing material, and checking the results. The fab handles front-end wafer manufacturing; testing, dicing, assembly, and packaging come afterward.
What happens inside a semiconductor fab?
A fab takes a designed circuit and physically forms its structures on a wafer. The wafer is a thin disc of semiconductor material; many copies of a chip design are made across its surface. The Semiconductor Industry Association (SIA) describes front-end manufacturing, also called fabrication, as the stage that transforms wafers into integrated circuits. SIA’s semiconductor manufacturing overview places it between chip design and back-end manufacturing.
Rather than carving a finished chip out of silicon in one operation, a fab builds features through many carefully controlled process steps. Different materials are deposited, modified, patterned, or removed in selected places. Measurement and inspection help determine whether each stage has produced the intended result.
How does wafer fabrication work?
A useful way to picture the process is repeated stencil work: create a pattern, use it to guide a material-processing step, and repeat as the circuit takes shape. The exact sequence depends on the product and process; no single fixed recipe applies to every chip.
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- Prepare or coat the wafer. The wafer surface is cleaned and prepared. For a lithography step, it is coated with a light-sensitive material called photoresist.
- Expose a pattern. A mask or reticle carries a circuit pattern. An optical projection system transfers a reduced image of that pattern onto the resist. ASML’s lithography explanation describes this pattern-transfer process.
- Develop the resist. The exposed resist is developed, leaving a patterned layer. Depending on the resist and process, this creates areas that protect the surface and areas that are exposed for further work.
- Add or remove material selectively. Deposition adds thin films; etching removes selected regions. The patterned resist helps direct where those processes act.
- Change electrical properties where needed. Doping introduces selected atoms into parts of the semiconductor to create regions with different electrical behavior.
- Flatten, clean, and inspect. Planarization helps restore a flat surface for additional layers. Metrology and inspection check dimensions, alignment, and process results before work continues.
These broad process families recur as the circuit’s layers are built. SIA says fabrication involves several hundred repeated steps; its 2026 testimony describes flows with 8–20 patterned layers and, in some cases, up to hundreds. Those figures describe different scopes and process examples, not a universal count for every chip. SIA’s front-end manufacturing overview outlines the main operation types.
What does photolithography do?
Photolithography transfers a pattern onto light-sensitive resist; it does not simply saw a finished chip shape out of the wafer. After exposure and development, the remaining resist acts as a temporary guide or protective mask for later steps such as etching or deposition. Repeating patterning and material-processing operations lets manufacturers build up a dense arrangement of device and circuit features.
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- NON-FUNCTIONAL SPECIMEN: This silicon sample is a display and educational specimen only. It is not an electronic component and does not perform computing or electrical functions.
- SEMICONDUCTOR EDUCATION USE: Suitable for classrooms, laboratories, engineering courses, STEM activities, and demonstrations of wafer structures and semiconductor manufacturing concepts.
- TECHNOLOGY DISPLAY ITEM: Ideal for exhibitions, science displays, collections, and demonstrations related to microelectronics and semiconductor technology.
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Deep ultraviolet (DUV) and extreme ultraviolet (EUV) are different lithography light technologies used for different patterning demands. That does not mean every layer on every chip is patterned with EUV. ASML’s lithography principles page and chipmaking overview explain the pattern-transfer role of lithography and the use of different technologies.
Why are fabs cleanrooms?
Particles and contamination can interfere with small structures, so fabs control the manufacturing environment. ASML describes cleanrooms that filter and recirculate air, regulate temperature, and use special garments to limit particles introduced by people. Its cleanroom description is a vendor explanation, not a specification that should be assumed to apply identically to every fab. ASML’s chipmaking overview provides more detail.
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When does a wafer become a finished chip?
Fabrication forms the circuits on the wafer, but a wafer leaving the fab is not yet a finished, packaged chip. It is electrically tested, then cut into individual dies. Those dies are attached, electrically connected, encapsulated, and tested as part of back-end manufacturing. Packaging protects the die and provides electrical connections so it can be used in a larger electronic system. SIA’s back-end manufacturing overview describes these steps.
A packaged chip can then be incorporated into a circuit board. The fab makes the wafer-level integrated circuits; it does not by itself produce a finished phone or computer.
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Who owns or operates a fab?
Companies organize design and manufacturing in different ways. These are business models, not different wafer-processing recipes.
| Business model | Who designs? | Who manufactures? |
|---|---|---|
| Integrated device manufacturer (IDM) | The company designs chips. | The company manufactures them in its own facilities. |
| Foundry | Customers provide chip designs. | The foundry manufactures chips for customers. |
| Fabless company | The company focuses on chip design. | It outsources fabrication, often to a foundry. |
ASML’s overview of how microchips are made explains these roles within the broader production chain.
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- AUTHENTIC SILICON SAMPLE: Real silicon wafer die sample featuring genuine wafer surface patterns, designed for semiconductor learning, research demonstration, and technology display purposes.
- NON-FUNCTIONAL SPECIMEN: This silicon sample is a display and educational specimen only. It is not an electronic component and does not perform computing or electrical functions.
- SEMICONDUCTOR EDUCATION USE: Suitable for classrooms, laboratories, engineering courses, STEM activities, and demonstrations of wafer structures and semiconductor manufacturing concepts.
- TECHNOLOGY DISPLAY ITEM: Ideal for exhibitions, science displays, collections, and demonstrations related to microelectronics and semiconductor technology.
- INDIVIDUAL PACKAGING: Each sample is separately packaged to help maintain surface cleanliness and reduce scratches during storage and handling.
How complex and costly is a leading-edge fab?
In 2026 testimony, SIA described semiconductor device fabrication as involving well over 1,000 precise steps. That is an industry association’s characterization, not a fixed count for every product or facility. The same testimony estimated investment of $20–25 billion for a leading-edge fab, spanning construction and manufacturing equipment; it is an attributed estimate, not a universal fab price or current quote. SIA also reported that the U.S. semiconductor industry reinvests an average of 20% of revenue in research and development, a figure scoped to the U.S. industry. SIA’s March 4, 2026 Senate testimony is the source for these figures.
Layer counts also depend on what is being counted and which process is under discussion. ASML broadly describes modern chips as having up to 100 layers, while SIA’s 2026 testimony gives a range of 8–20 patterned layers for some process flows and says some can reach hundreds. Neither figure should be treated as a count that applies to every chip. ASML’s chipmaking overview and SIA’s 2026 testimony describe those respective figures.
Quick Recap
What a fab does—and what it does not do
- A fab performs front-end manufacturing, building integrated-circuit structures on wafers.
- It uses repeated patterning and material-processing operations, with inspection and measurement along the way.
- Back-end manufacturing separates the dies, assembles and packages them, and tests the resulting chips.
- Chip design comes before fabrication; products such as phones and computers come after packaged chips are integrated into larger systems.
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