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Re:

Tera Computer Buys Cray from SGI and Readies CMOS Processors

Tera’s 2000 deal brought Cray product lines, staff, facilities and its brand under the company later renamed Cray Inc., alongside a CMOS MTA roadmap.
From TheFinanceBase Team3 min to read
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On March 2, 2000, Tera Computer announced an agreement to acquire SGI’s Cray supercomputer business and the Cray brand. The deal closed on April 1, 2000, and Tera renamed itself Cray Inc. The announcement also set out Tera’s plan to commercialize its Multithreaded Architecture (MTA) with CMOS processors—a roadmap whose performance and power figures were company claims, not independent test results.

What Tera announced—and when the deal closed

Tera Computer Company announced on March 2, 2000, that it had signed a definitive agreement to acquire SGI’s Cray vector-supercomputer business unit. The contemporary announcement described consideration involving common stock, cash, and notes, but did not disclose the terms. Cray Inc.’s later SEC filing says the operating-asset acquisition closed on April 1, 2000; Tera changed its corporate name to Cray Inc. that day. EE Times reported the announcement; the 2003 SEC prospectus records the closing and transaction details.

What the acquisition included

The transaction was broader than a transfer of the Cray name. Cray Inc.’s 2003 prospectus says Tera acquired the Cray T90, SV1 and T3E product lines, other product lines, the Cray X1 development project and its related cost-sharing contract, and the service organization supporting installed systems. The acquired assets also included integration and final-assembly operations, software and expertise, inventory, real property in Chippewa Falls, Wisconsin, and the Cray brand. Tera received approximately 775 employees.

The filing says Tera paid SGI $50.3 million in cash and issued 1,000,000 shares of common stock. Those disclosed terms provide detail absent from the March announcement. The filing described Tera as having approximately 125 employees before the acquisition; EE Times characterized the combined company as having roughly 900 people.

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Why Tera paired Cray with its MTA architecture

Tera’s stated strategy was to combine its MTA architecture with Cray’s vector systems, software, manufacturing capacity, customer relationships and service organization. The company identified government and national security, university research and commercial applications as markets it served. The stated rationale was an expectation at the time, not proof that the combination delivered every anticipated benefit.

Tera president and CEO Jim Rottsolk said the acquisition would create “a profitable, new company with major market presence, outstanding talent, complementary product lines and a strong infrastructure.” He also said the investment showed that “supercomputers are not a dying industry.” These were company statements accompanying the transaction. IDC Group Vice President-Worldwide Systems & Servers Debra Goldfarb offered a similarly optimistic view, saying Cray Inc. would “reinvigorate the global high-performance sector.” HPCwire reported the contemporary statements.

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What Tera said CMOS would change

Tera presented CMOS as a way to make MTA systems easier to manufacture and potentially improve reliability and performance, while reducing parts, power consumption and connections compared with its earlier gallium-arsenide (GaAs) design. The company’s reported comparisons were specific to the designs it described in 2000:

Comparison reported by Tera in 2000 CMOS Torrent design Earlier GaAs design
Processor implementation One CMOS Torrent processor replaced 24 GaAs ASICs 24 ASICs replaced by the Torrent, according to Tera
Power 50 watts for the Torrent chip 1,000 watts for the GaAs design
Board connections 1,025 connections on the processor board 14,400 connections on the GaAs board

EE Times reported that Tera said a Torrent chip could support up to 128 virtual RISC-like processors, or threads. These are attributed company figures, not independently verified comparative measurements. The article also reported that Tera’s CMOS designs were being fabricated by Taiwan Semiconductor Manufacturing Co. (TSMC), with a flip-chip package intended to address power, clock distribution and high-speed signaling.

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The commercialization plan and what was later established

In 2000, Tera planned to begin commercializing CMOS MTA systems in configurations ranging from 16 to 64 processors. That was a forward-looking schedule reported at the time; it does not establish that systems were delivered on that timetable. The later SEC prospectus offers a narrower retrospective milestone: MTA-2’s CMOS reimplementation was essentially complete at the end of 2001. It does not, by itself, establish delivery dates or commercial outcomes for each system in the original plan.

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The market outlook was a forecast, not a result

In 2000, IDC forecast that the high-performance computing market would reach $5 billion that year and about $7.5 billion in 2003, as reported by HPCwire. These were historical forecasts, not measured figures for those years or estimates of today’s market. They help explain the optimism surrounding the deal, but should not be read as confirmation that the projected growth occurred.

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