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Carbon Design Systems

What CPU Became Available With Carbon’s VSPs?

Pacific Design’s VUPU combined a general-purpose RISC unit with configurable data-path execution units for Carbon’s virtual system prototyping platform.

By TheFinanceBase Team 2 min read

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Pacific Design’s configurable VUPU processor and its instruction-set simulator became available on Carbon Design Systems’ virtual system prototyping (VSP) platform, according to an EDN report published October 28, 2005. VUPU was professional processor IP for ASIC and system-on-chip development—not a consumer CPU for desktop PCs.

What Carbon’s VSP platform did

Carbon Design Systems’ virtual system prototyping approach let engineers assemble and functionally validate a system on a desktop before silicon was available. Its models could span C, SystemC, RTL, IP cores, transaction-level models and instruction-level models. EDN reported that prototypes could execute billions of cycles and boot embedded operating systems, giving software teams a way to begin validation before chips were fabricated.

The aim was to bring software and hardware models together in one virtual prototype rather than wait for a physical device. A design could include instruction-level models alongside compiled RTL and other model types, with hardware represented by silicon-accurate models.

How the VUPU processor worked

Pacific Design described VUPU as a configurable processor built from a general-purpose RISC processing unit and one or more variable-cycle data-path execution units, called VUs. The RISC unit handled general-purpose processing; the VUs were tailored to data-path work.

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Configure data paths around profiled software

Engineers could profile software with Pacific’s MAX profiler and configure VUs to suit the measured workload. Alternatively, users could supply predefined RTL macros for the data-path units. This offered a route to align the processor’s data-path hardware with the application rather than rely on a fixed, general-purpose configuration.

Represent the processor in the virtual prototype

In the VSP, the processor was modeled with an instruction-set simulator, while VU hardware and other RTL blocks were compiled into virtual silicon models. This combination allowed software execution and hardware behavior to be evaluated together before physical silicon existed.

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What the reported speed comparison means

EDN reported one customer example: software-validation runtime fell from nine hours on a “popular EDA simulator” to 40 minutes on a VSP. Those figures describe the customer design cited in the October 28, 2005 article; they are not a universal benchmark or a guarantee of performance on other designs.

Validation approach Reported runtime in EDN’s customer example What the article says about it
Popular EDA simulator Nine hours Conventional simulator used for the customer’s software-validation run.
Carbon VSP 40 minutes VSP used for the customer’s software-validation run; it combined model abstraction levels and could boot embedded operating systems.

The example illustrates why a VSP could be useful when software teams needed to exercise a system for many cycles before silicon was ready. It does not establish that every VSP workload runs faster by the same proportion; results depend on the design, models and workload.

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Is VUPU available as a consumer CPU today?

No evidence in the 2005 report establishes current ownership, pricing, licensing, support or retail availability for VUPU. The article describes professional processor IP used in ASIC and SoC development, not a retail chip intended for an ordinary PC. It therefore should not be treated as a currently purchasable consumer processor or as a product with verified present-day availability.

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