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Broadcom announced on November 6, 2000, that it had agreed to acquire SiByte, a fabless chip company whose MIPS processor technology targeted networking equipment. The proposed deal offered up to 9.3 million Broadcom Class A shares; contemporary reporting put the initial stock value at about $2.06 billion and the possible fully realized value at $2.46 billion. Broadcom said the acquisition would pair SiByte’s processors with its communications and networking products.
When did Broadcom acquire SiByte?
Broadcom announced on November 6, 2000, that it had signed a definitive agreement to acquire SiByte, Inc. The Santa Clara company developed highly integrated processors for networking and communications. Broadcom expected the transaction to close within 60 days, subject to shareholder approval, regulatory review and customary conditions. The cited announcement and later documentation do not establish the exact legal closing date, so November 6 is the announcement date, not a confirmed closing date.
How much did the acquisition cost?
The announced consideration was up to 9.3 million Broadcom Class A shares, rather than a fixed cash price. About 5.6 million shares were to be issued at closing, with roughly 3.7 million more tied to performance goals, according to Broadcom’s 2000 announcement.
EE Times calculated the initial stock value at about $2.06 billion using a share price of $222, and reported a possible fully realized value of $2.46 billion if milestones and options were achieved. These are contemporary estimates based on Broadcom’s share price and the deal’s contingent components, not a cash purchase price or proof that the maximum consideration was ultimately paid.
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Why did Broadcom buy SiByte?
Broadcom presented the deal as a way to add high-performance processors to its portfolio of IP switches, communications digital signal processors, security products and physical-layer devices. The intended fit was broadband and Internet infrastructure: combining processors with Broadcom’s existing communications and networking components could give equipment makers a broader set of building blocks.
SiByte brought commercial traction as well as processor designs. Broadcom said SiByte had multiple design wins and firm multi-year contracts totaling more than 1.3 million units, at multi-hundred-dollar average selling prices. Those were figures stated by Broadcom in 2000, not independently audited results or a guarantee of later shipments.
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Broadcom CEO Henry T. Nicholas III described the planned addition as “the world’s fastest and lowest power MIPS industry-standard broadband processor technology.” That was the company’s claim at announcement, not a comparative result established here. SiByte CEO Dan Dobberpuhl said Broadcom’s product range and geographic reach offered an opportunity to expand SiByte’s broadband processor business worldwide.
What was SiByte’s SB-1 MIPS processor?
The SB-1 was SiByte’s 64-bit superscalar MIPS core, designed for network processing. Broadcom’s announcement described a quad-issue pipeline, integrated 32K instruction and data caches, and operation up to 1.0 GHz. Broadcom also cited benchmark simulation above 2,200 Dhrystone 2.1 MIPS at 1.0 GHz. That is the announcement’s simulated benchmark figure, not a reported independent test of a shipping system.
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The processor technology sat within a wider product effort. SiByte’s Mercurian family targeted high-speed LAN, MAN and WAN equipment, as well as VoIP gateways, optical networking and wireless communications. Its SB-1250 combined two MIPS64 cores with cache and I/O on a system-on-chip, with functions aimed at packet classification, queuing, forwarding, exception processing, routing and load balancing.
How did the SB-1250 and BCM1250 fit into the story?
Broadcom’s September 26, 2002 white paper documented the BCM1250/SiByte family as dual 64-bit MIPS-core products scalable from 600 MHz to 1 GHz. It described potential uses including IP SAN gateways, SAN routers, network-attached storage systems and iSCSI cards. This later document shows how the acquired technology was presented in Broadcom’s product portfolio; it does not by itself establish the fate of every SiByte design or the duration of support for each chip.
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The dual-core SB-1250 illustrates the distinction between a processor core and a finished system-on-chip. The SB-1 was the MIPS core architecture; the SB-1250 integrated two such 64-bit cores with cache and I/O for network equipment tasks. That integration was intended to handle more than raw CPU work, bringing communications-related functions closer to the processor.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What happened to SiByte?
The acquisition was intended to fold SiByte’s processor technology and business into Broadcom, and Broadcom subsequently documented the BCM1250/SiByte family. The available announcement establishes the proposed terms and strategic rationale, while the later white paper confirms continued product documentation in 2002. These sources do not identify the exact legal closing date or provide a complete account of SiByte as a separate corporate entity after the deal.
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