The Tool Desk
Outbyte Driver Updater FREEScan for outdated or missing drivers - takes under a minuteDriver Scan →Outbyte PC Repair FREERepair Windows errors before they cause bigger problemsFix Now →SMIC’s 2023 7-nanometer breakthrough made a 5-nanometer-class process technically plausible, but it did not prove that China’s leading foundry had matched TSMC or Samsung in commercial 5-nanometer manufacturing. As of the publicly available evidence through August 16, 2026, SMIC had demonstrated a credible, DUV-based scaling path and continued improving 7-nanometer-derived chips. Independent evidence of a repeatable, high-yield, high-volume process equivalent to TSMC N5 or Samsung 5nm remains absent.
What the September 2023 prediction actually said
The headline came from an EE Times report published September 20, 2023. It followed the identification of a SMIC-made, 7-nanometer-class chip in Huawei’s Mate 60 Pro and asked whether the same techniques could take SMIC to 5 nm.
| # | Preview | Product | Price | |
|---|---|---|---|---|
| 1 |
|
Physics of Semiconductor Devices | $65.94 | Buy on Amazon |
| 2 |
|
Semiconductor Physics And Devices: Basic Principles | $128.30 | Buy on Amazon |
| 3 |
|
Semiconductor Device Fundamentals | $253.38 | Buy on Amazon |
| 4 |
![Semiconductor School: World-class semiconductor textbook [1st Edition]](https://m.media-amazon.com/images/I/31PxwgC+RsL._SL160_.jpg)
|
Semiconductor School: World-class semiconductor textbook [1st Edition] | $32.37 | Buy on Amazon |
| 5 |
|
Semiconductor Devices: Physics and Technology | $138.92 | Buy on Amazon |
The answer from the quoted experts was a forecast, not a process announcement. Former TSMC legal counsel Dick Thurston expected SMIC to reach 5 nm without extreme-ultraviolet (EUV) lithography. A former TSMC engineer said that TSMC had initially developed its own 7-nm generation without EUV, making SMIC’s approach technically credible. Semiconductor Advisers president Robert Maire estimated a one-to-three-year timetable, with roughly two years the most likely point estimate.
The story also cited Chinese industry sources estimating about 70% yield for SMIC’s 7-nm production and said that yield was improving. That figure was not an independently audited SMIC disclosure. SMIC had stopped publicly providing a detailed process-node breakdown in early 2022, leaving analysts dependent on teardowns, products and industry sources.
Recommended Free Tools
#1 Best Overall
Why the 7-nanometer chip mattered
The Huawei teardown was important because it provided third-party evidence that SMIC could manufacture a leading-edge logic chip despite restrictions on China’s access to the most advanced semiconductor equipment. It also showed that export controls had not frozen China at the 14-nm level targeted by earlier controls.
Huawei matters commercially and strategically. It designs advanced smartphone and artificial-intelligence chips, while SMIC supplies manufacturing. Huawei product launches therefore offer one of the few public windows into SMIC’s capabilities. A teardown can reveal the likely process generation even when the foundry does not publish a node roadmap.
That evidence has limits. One smartphone chip demonstrates a production capability for that product, not necessarily a broadly available foundry service. Huawei may prioritize a strategic device, accept higher costs, use a relatively small die or tolerate lower yields that an international customer could not.
What “5 nm” means—and what it does not
Modern node names are technology-generation labels, not literal measurements of every transistor feature. A node designation combines transistor density, performance, power characteristics, design rules and manufacturing methods.
Rank #2
| Term | Meaning |
|---|---|
| Nominal 5-nm node | A foundry’s label for a process generation. |
| 5-nm-equivalent density | Broadly similar transistor density or performance achieved by a different process. |
| 5-nm-class chip | A looser description based on an independent assessment or product characterization. |
| Commercial 5-nm process | A repeatable process with competitive density, performance, power, yield, cost and capacity. |
Consequently, “SMIC reached 5 nm” is too broad unless the claim specifies which dimensions and process characteristics were verified. A 7-nm-derived process may incorporate scaling associated with a 5-nm generation without matching the economics or electrical performance of TSMC’s N5.
How SMIC could pursue 5 nm without EUV
Deep-ultraviolet multi-patterning
The proposed route uses deep-ultraviolet (DUV) lithography with multi-patterning. Instead of printing a very dense pattern in one EUV exposure, the manufacturer divides it into several patterns and exposes the wafer repeatedly. Combining those patterns can produce a smaller effective pitch than a single DUV exposure normally allows.
The price of repeated exposures
Multi-patterning adds masks, alignment steps, process time and opportunities for defects. Overlay errors—small misalignments between successive exposures—can reduce electrical performance or make dies unusable. More steps also increase wafer cost and limit how quickly a fab can produce output.
DUV can therefore make selected 5-nm-class layers technically possible without making the resulting process equivalent to an EUV-based one. A process might achieve the required geometry while losing on cycle time, density, power, yield or cost.
Quick wins for a faster PC:
Fix the driver behind crashes, sound loss and screen glitchesFind Drivers →Clear out junk files and repair common Windows errorsFree Scan →Scan for outdated or missing drivers - takes under a minuteDriver Scan →Rank #3
The bottlenecks beyond lithography
Yield
Yield is the percentage of dies that pass the relevant manufacturing and electrical tests. It determines the cost of each usable chip, especially for large processors where a single defect can invalidate an expensive die.
Public estimates conflict. The EE Times account cited an approximately 70% 7-nm yield estimate from Chinese industry sources. A later CSIS analysis cited roughly 20% yield for certain advanced production activity. Those numbers cannot be treated as universal SMIC figures: they may describe different factories, products, die sizes, process generations or definitions of yield. Neither source provides a comprehensive, independently audited SMIC yield series.
Capacity
Even a technically functioning process must produce enough wafers for a product launch. CSIS also reported an estimate of approximately 20,000 7-nm wafers per month in its specific reporting context. That is an estimate for advanced production, not an official current SMIC-wide capacity figure.
Readers should distinguish four stages:
- an engineering or laboratory demonstration;
- a pilot line with limited output;
- commercial production for a selected customer; and
- sustained high-volume manufacturing at acceptable cost.
Equipment and supporting processes
Advanced logic requires more than a scanner. Deposition, etching, cleaning, inspection, metrology, packaging and design software all affect whether a process can scale. CSIS identified shortages in several of these equipment categories as constraints on expanding SMIC’s advanced-node capacity.
Windows Errors? Fix Them Before They Spread
Repair common Windows errors and clear accumulated junk for a smoother, more stable PC - no reinstall needed.Free scan · no reinstallCrashes, No Sound, or Screen Glitches?
Random freezes, missing sound and display glitches usually trace back to one bad driver. Find and replace yours safely.Free scan · under a minuteWhat later Huawei chips show
Subsequent products indicate continued progress, but not a clean confirmation of the two-year forecast.
- A Reuters report said a later Huawei laptop used an older SMIC-made 7-nm N+2 chip, suggesting that product availability did not automatically mean a newer node had entered volume production: Investing.com’s reproduction of the report.
- Reporting based on TechInsights analysis described a later N+3 process as an evolution of SMIC’s 7-nm-class technology, not as automatic proof of parity with standard TSMC or Samsung 5 nm: Tom’s Hardware.
- Reuters also reported that Huawei was pursuing architectural methods to improve performance without relying solely on smaller transistors: Investing.com’s reproduction of the report.
Architecture, packaging, cache, interconnects, memory bandwidth and software can raise product performance without a process shrink. A faster Huawei product therefore does not, by itself, establish a new SMIC node.
Why EUV still matters
China’s restricted access to ASML EUV systems is the most visible constraint on leading-edge production. DUV multi-patterning can substitute for EUV in principle, but EUV’s value is productivity as much as printable resolution: fewer exposures, fewer alignment opportunities and a shorter process flow for the densest layers.
That advantage compounds across a complete logic process. Avoiding EUV may be feasible for a strategically important chip while remaining uneconomic for broad foundry capacity. The relevant comparison is therefore not “Can DUV print a small feature?” but “Can the entire process deliver competitive good dies at the required volume and cost?”
Free tools Windows power users keep installed
One-click scans. No signup required.
Best Value
What export controls have—and have not—done
Export controls appear to have increased the difficulty and expense of China’s advanced manufacturing by limiting EUV access and restricting selected equipment, servicing and design-tool capabilities. They have not stopped China from producing 7-nm-class chips or from pursuing more advanced domestic processes.
The evidence supports a middle position:
- Not total prevention: Huawei and SMIC produced advanced chips despite the controls.
- Not irrelevance: reported yield, capacity, equipment and cost constraints indicate that restrictions can delay transitions and limit scale.
- Not proven parity: a domestic chip launch does not show that SMIC can offer TSMC- or Samsung-level economics to a broad customer base.
The U.S.-China Economic and Security Review Commission’s 2025 annual report described SMIC’s 7-nm production as part of China’s effort to build advanced domestic capability while noting the continuing importance of export controls and domestic-equipment development.
How to judge a claimed SMIC 5-nm breakthrough
Technical evidence
- An independent teardown identifies the process.
- Transistor density, metal layers or other relevant characteristics are published.
- The claim distinguishes a genuine 5-nm-class process from an improved 7-nm-derived generation.
- The evidence concerns a production chip rather than only an engineering sample.
- Measurements are comparable with TSMC and Samsung definitions.
Manufacturing evidence
- Multiple production lots show repeatability.
- Independent yield data are available and clearly defined.
- The process supports large dies, not only small test chips.
- There is evidence of sustained shipments.
- Capacity and equipment support the claimed product volume.
Commercial evidence
- Good-die cost is acceptable for the target market.
- Power, performance and thermal results are competitive.
- Capacity can support smartphone or AI-chip demand.
- Customers accept the economics beyond a single strategic Huawei product.
Bottom line on the 2023 forecast
The observers’ central technical argument was reasonable: SMIC’s 7-nm use of DUV multi-patterning made an attempt at 5-nm-class scaling credible. But “on its way” described an expected trajectory, not a verified destination.
The public record through August 16, 2026 supports three conclusions: a DUV-based route to some 5-nm-class characteristics was technically plausible; continued 7-nm-derived progress was real; and a commercially competitive, high-yield, high-volume process equivalent to TSMC N5 or Samsung 5nm has not been independently established.
Strategically, that distinction matters. Even imperfect advanced production gives China a domestic source for sophisticated smartphones and potentially AI hardware. Economically, however, the decisive test remains repeatable yield, scalable capacity and cost per good die—not the node label attached to one product.
Quick Recap
Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.
