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A custom ASIC can give an OEM more control over component availability and product longevity—but it does not make supply risk disappear. Ian Lankshear, CEO and co-founder of EnSilica, argues in his February 7, 2024 EE Times partner-content article that designing silicon around a system’s needs can replace several catalog parts, reduce exposure to vendor obsolescence and make long-lived products easier to support. The trade is a different risk profile: higher upfront engineering and licensing cost, dependence on selected fabs and packaging partners, and potentially lengthy qualification if the design or manufacturing route changes.
What control a custom ASIC can add
Lankshear’s argument starts with integration. An ASIC can combine functions that would otherwise require several components. Depending on the application, that may reduce passive-component count, shrink the bill of materials and simplify PCB layout. Those are possible design outcomes, not guaranteed savings; the result depends on the functions integrated, the process technology and the volume over which development costs are recovered.
Custom silicon can also change how an OEM manages end-of-life notices. A standard-component supplier may discontinue a less popular device, forcing a last-time buy, a redesign or a decision to end the product. An ASIC designed for the OEM’s system can provide continuity for longer if the relevant process, intellectual property and manufacturing capacity remain available.
That distinction matters for products with long service obligations. The OEM is no longer accepting the catalog market’s priorities as the only determinant of availability; it is making architecture, process and capacity decisions itself. In return, it becomes responsible for those decisions.
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When does a custom ASIC make sense?
An ASIC proposal is strongest when supply continuity is a design requirement rather than a purchasing preference. Evaluate the following conditions together:
- Long product life: the product must be supported well beyond the normal life of one or more catalog components.
- Meaningful volume or strategic value: expected shipments, service commitments or product differentiation can justify nonrecurring engineering costs.
- Several functions can be integrated: combining analog, digital, memory, power or interface functions produces a clear system-level benefit.
- Power, size or performance constraints are tight: reducing packages and board area has value beyond the component price.
- Catalog alternatives are weak: the existing parts have limited longevity, scarce second sources or interfaces that constrain future substitutions.
An ASIC is a poor fit when requirements are changing rapidly, volumes are uncertain, reusable IP is unavailable or a programmable device can meet the need with materially less commitment. There is no universal break-even volume in Lankshear’s article; the answer depends on lifetime, integration, process and risk tolerance.
The economics are more than a chip price
Compare the full program cost, not just the eventual unit cost. Lankshear identifies process node, memory and logic requirements, voltage levels, available IP and licensing costs as key inputs. Custom development can include architecture and verification, masks, third-party IP, software changes, test development and qualification. A lower bill of materials may not offset those costs if the product ships in small numbers or is replaced quickly.
| Cost or decision factor | Why it matters | Question for the business case |
|---|---|---|
| Nonrecurring engineering | Design work, masks, verification and test are paid before production volume. | Over what realistic lifetime volume can these costs be recovered? |
| IP and licensing | Bluetooth, processor, interface and other reusable blocks may carry acquisition or royalty costs. | Which functions can be developed internally, and which require licensed IP? |
| Integration savings | Fewer packages and passives can reduce board area, assembly complexity and some procurement lines. | What verified system-level savings result from consolidation? |
| Inventory and capacity | Wafer or die banking ties up cash but can provide disruption coverage. | How much inventory is justified by the product’s service obligations? |
| Change cost | Moving a design to another process or supplier can require redesign and requalification. | What is the financial impact of a migration and its delay? |
ASICs relocate supply-chain risk
Integration can create a new single point of dependency. A system may end up relying on one ASIC supplier, one foundry, one outsourced semiconductor assembly and test (OSAT) provider or one companion chip. A custom part therefore needs a supply architecture of its own.
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Foundry and process concentration
A design optimized for one foundry process is not automatically portable. Design kits, analog characteristics, embedded memories and hard IP can differ between processes. Duplicating production at another foundry may require substantial redesign and qualification, especially when the design uses process-specific analog or memory features.
Companion-component dependence
Do not integrate every function if doing so removes useful alternatives. Preserve interfaces or duplicate selected functions where they allow the ASIC to operate with more than one catalog companion component. This can retain switching options without giving up the main benefits of integration.
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Packaging and test dependence
Lankshear describes moving OSAT operations as generally faster and less costly than moving a fab, but it is not instantaneous. For automotive products, qualification to AEC-Q100 after an OSAT move can take several months. That lead time must be included in continuity planning.
Buffers, capacity and migration time
Where feasible, an OEM can reserve wafer capacity and bank wafers or finished dies. Lankshear suggests that such a buffer may cover one or two years and presents two years as a possible migration window. That is his planning guidance, not a universal rule. The right quantity depends on demand uncertainty, shelf-life and the time required to qualify another manufacturing route.
Banking inventory exchanges cash and storage for time. It can prevent an immediate line stop while an alternative fab, OSAT or companion component is qualified, but it does not solve a defective design or an unavailable process. Capacity reservations have their own contractual and financial terms and should be reviewed alongside the inventory plan.
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Examples described by Lankshear
Automotive architecture
In the automotive example, a companion processor is used with an ASIC, while interfaces are added to preserve flexibility around peripheral functions. The point is architectural: integrate where it delivers value, but avoid making every surrounding function inseparable from one source. The example is an author-provided illustration, not an independently tested comparison.
Medical-monitoring patch
Lankshear describes a fully integrated patch design as carrying several million dollars in mask, Bluetooth Low Energy IP and Arm licensing costs. His alternative uses a catalog Bluetooth LE IC alongside a 130 nm analog-front-end ASIC, designed to work with catalog parts from Nordic, STMicroelectronics and Silicon Labs. These figures and choices are the author’s illustration, not a general price estimate or independently verified case study.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.A practical decision framework
Compare three architecture paths against the same product assumptions. The relevant choice is not simply “custom versus standard”; it is how each option performs over the product’s entire life.
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| Decision axis | Catalog components | FPGA or other programmable approach | Custom ASIC |
|---|---|---|---|
| Upfront cost | Usually lowest development commitment. | Moderate hardware and development commitment. | Higher design, mask and IP commitment. |
| Flexibility after launch | Depends on available replacements and interfaces. | Typically high through reprogramming, subject to device longevity. | Low after fabrication; changes may require a new design. |
| Unit integration | Several packages may be required. | Can consolidate logic, but may retain external analog or memory devices. | Potentially highest integration and smallest system footprint. |
| Obsolescence exposure | Directly exposed to each vendor’s catalog decisions. | Exposed to programmable-device availability and tool support. | Reduced for integrated functions if process and capacity remain available; companion risks remain. |
| Second-source strategy | Often possible when compatible parts exist. | Part and tool compatibility must be checked. | Requires process, IP, layout and qualification planning; portability is not automatic. |
| Migration lead time | Can be short if a qualified drop-in exists; otherwise redesign may be needed. | May require firmware, timing and hardware validation. | Potentially long because a new process or fab can require redesign and qualification. |
For each path, model expected volume and lifetime, power and size targets, performance, compatible alternatives, fab and OSAT concentration, geographic options, inventory carrying cost and qualification time. Use scenario analysis for a supplier exit, a capacity shortage and a quality problem rather than relying on one optimistic forecast.
How to make resilience a design constraint
- Map the current dependency chain. List every critical IC, passive network, package, OSAT, fab, IP block and software dependency. Mark single-source items and the time required to qualify a substitute.
- Separate functions that benefit from integration. Identify which analog, memory, logic, voltage and interface requirements genuinely belong in one die and which are better left as replaceable catalog parts.
- Choose the process from requirements. Select the node and platform based on analog performance, memory, logic density, voltage capability, IP availability and expected longevity—not on marketing labels alone.
- Design the interfaces for alternatives. Define electrical, protocol and firmware boundaries that allow compatible companion components where practical.
- Price the complete program. Include design, masks, IP and licensing, verification, test, qualification, capacity reservations, inventory and the cost of a possible migration.
- Plan manufacturing redundancy. Assess multiple fab locations or qualified process options where the economics and technical constraints permit. Treat OSAT qualification as a schedule item, not an assumption.
- Set the buffer policy. Decide whether wafer or die banking is needed, how many months of demand it covers and what triggers replenishment or migration.
- Review the plan at each product milestone. Foundry availability, IP support, companion parts and demand forecasts change; a resilience plan should change with them.
What the 2024 viewpoint does—and does not—establish
The EE Times article is partner content by Ian Lankshear, dated February 7, 2024. It provides an industry viewpoint and design framework, not an independently tested comparison, a current semiconductor-market survey or a universal cost model. Its general principles—integrate selectively, preserve alternatives, and plan capacity and qualification—remain useful, while present-day process availability, fab locations, prices and shortage conditions require current verification for a specific program.
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