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A semiconductor foundry manufactures chips from designs supplied by other companies. Taiwan Semiconductor Manufacturing Company (TSMC) is the leading example of a pure-play foundry: it says it does not design, manufacture or market semiconductor products under its own name, so it can produce chips for customers without selling competing chip products. In fiscal 2025, wafer fabrication generated about 86% of TSMC’s net revenue; packaging, testing, mask making, design services and royalties supplied most of the remainder.
What a semiconductor foundry does
A semiconductor foundry is a contract manufacturer for integrated circuits. A chip designer develops the circuit, chooses a manufacturing process and supplies the design data. The foundry owns and operates the fabrication plants, process technology, production equipment and manufacturing capacity needed to turn that design into physical silicon.
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This arrangement separates design from manufacturing. A chip company can sell a processor, modem, accelerator or controller without raising the enormous capital required to build and run a fabrication plant. The foundry, meanwhile, serves many customers and spreads its factories and process-development costs across their orders.
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Foundry work is more than running wafers through machines. The manufacturer develops process technologies, qualifies equipment, manages yields, makes photomasks and schedules capacity. It may also provide packaging and testing, which turn a finished wafer into individually packaged, tested chips. The exact commercial terms, design hand-offs and responsibilities vary by customer; the sequence below is a high-level industry model rather than a description of every contract.
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The typical customer-to-chip workflow
- Design and process selection. The customer creates an integrated-circuit design and selects a compatible process technology, such as a particular logic node or specialty process.
- Manufacturing preparation. The design is prepared for the foundry’s rules and converted into photomasks. Those masks define the patterns printed on silicon wafers.
- Wafer fabrication. The foundry repeatedly deposits, patterns, etches and cleans layers on wafers. Hundreds of process steps can be required before the wafer contains many copies of the customer’s chip.
- Electrical testing and yield management. Devices on the wafer are tested, and the manufacturer uses production data to improve the proportion of working chips.
- Packaging and final test. Individual dies are separated, packaged and tested. Advanced packaging can connect multiple dies or stack them in three dimensions.
- Delivery. Tested components are shipped to the customer or its assembly partners for use in finished products.
Why TSMC is called a pure-play foundry
TSMC’s defining business decision is to manufacture customer products without selling semiconductor products under its own name. In its company profile, TSMC says that by not designing, manufacturing or marketing its own semiconductor products, it avoids competing with customers. Chief Executive Officer and Chairman C.C. Wei described the approach in the 2025 Annual Report as “our steadfast adherence to the pure-play foundry business model.”
That distinction matters because a foundry receives sensitive information about customers’ designs, production schedules and future products. A pure-play model gives customers a reason to place business with the manufacturer without creating a direct product competitor. TSMC also describes its responsibility as providing customers with advanced technologies and the capacity needed to commercialize their innovations. Those statements are the company’s description of its strategy, not independent customer endorsements.
The alternative is an integrated device manufacturer, or IDM. An IDM can design and manufacture its own chips and may sell them under its own brand. A pure-play foundry instead earns manufacturing revenue from other companies’ designs. Some businesses combine foundry services with their own products, so “foundry” and “IDM” describe business models rather than a simple ranking of technical ability.
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TSMC’s principal product is wafer fabrication: customers pay it to manufacture chips on silicon wafers using specified process technologies. The company also records revenue from related services. Its 2025 Form 20-F reports the following figures for the year ended December 31, 2025:
| Measure | 2025 result | What it means |
|---|---|---|
| Net revenue | NT$3,809,054 million (US$121,423 million) | Total revenue reported for the fiscal year |
| Net income attributable to shareholders of the parent | NT$1,697,604 million (US$54,116 million) | Profit attributable to the parent company’s shareholders |
| Wafer fabrication share of net revenue | Approximately 86% | The dominant disclosed revenue stream |
| Other revenue | Packaging and testing, mask making, design and royalty income | Related services and other sources outside wafer fabrication |
The 86% figure is a share of aggregate company revenue, not a price or margin for a particular chip. TSMC’s public disclosures do not establish what a specific customer pays for a wafer, how contracts allocate costs, or which process node produces the highest profit per chip. Revenue by itself also does not reveal the profitability of an individual product or customer.
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Wafer fabrication
Wafer fabrication is the economic engine because it uses the company’s fabs and process technologies. Customers generally pay for manufacturing capacity and completed wafers, with economics affected by the process selected, wafer starts, usable die yield, complexity and contractual terms. TSMC reports the total outcome across its customer base rather than publishing customer-by-customer prices.
Packaging and testing
After fabrication, chips need electrical testing and a package that connects the die to a circuit board or another chip. TSMC identifies packaging and testing as important sources of non-wafer revenue and offers advanced approaches such as chip stacking and high-density interconnect. The Form 20-F does not provide a separate revenue total for each named packaging technology.
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Mask making, design services and royalties
Photomasks are the templates used to print circuit patterns during fabrication. TSMC also reports design-related income and royalties. These streams support the manufacturing relationship but are much smaller in aggregate than wafer fabrication, which accounts for approximately 86% of 2025 net revenue.
TSMC’s scale and technology mix in 2025
TSMC’s business depends on serving many designs across multiple process generations rather than relying on one chip. For 2025, the company reported 534 customers, 12,682 products and 305 distinct technologies. Its annual manufacturing capacity exceeded 17 million 12-inch-equivalent wafers.
| Scale or technology measure | 2025 disclosure | Important qualification |
|---|---|---|
| Customers | 534 | Company-reported count for 2025 |
| Products manufactured | 12,682 | Product count, not unit volume |
| Distinct technologies | 305 | Technology count reported by TSMC |
| Annual capacity | More than 17 million 12-inch-equivalent wafers | Capacity measure, not the number actually sold |
| 7nm-and-smaller processes | 74% of wafer revenue | Wafer-revenue mix, not unit or profit share |
| 3nm processes | 24% of total wafer revenue | Wafer-revenue mix for 2025 |
| 2nm process | Entered high-volume manufacturing in the fourth quarter of 2025 | Timing stated by the company |
TSMC defines “advanced” processes in this disclosure as geometries of 7nm and smaller. Their 74% share of wafer revenue rose from 69% in 2024. The 3nm figure is included within the advanced-process total. Neither statistic says that 74% of physical wafers, customer products or company profit came from those nodes.
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The company lists CoWoS, InFO, TSMC-SoIC and TSMC-COUPE among its advanced packaging and three-dimensional stacking technologies. These technologies are intended to support high-bandwidth connections, large-scale interconnectivity and combinations of multiple dies. TSMC’s financial reports group packaging and testing among other revenue sources but do not state standalone revenue for each technology.
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TSMC identifies several factors that can materially change revenue:
- Worldwide semiconductor demand. Orders rise and fall with demand for products that use chips, including computing, mobile, automotive and connected devices.
- Capacity supply. If customers need more wafers than available capacity, shipments are constrained; excess capacity can make utilization and pricing less favorable.
- Pricing. Prices reflect process technology, product complexity, capacity conditions and the value customers place on reliable manufacturing.
- Production capacity. New fabs, equipment and qualified process capacity determine how many wafers can be produced and where.
- Technology development. Moving to new process generations requires sustained engineering and capital investment, but successful technologies can attract high-value designs.
TSMC says customers value flexible manufacturing capabilities, customer service and timely delivery of high-yield products, and that this value is reflected in pricing. This is a company disclosure about the basis of its offering, not a separately verified survey of customers.
For an investor, the important distinction is between volume, price and mix. More wafer starts can increase revenue, but a change in process mix can matter just as much. A newer node may carry a different price and cost structure from an established specialty process. Public aggregate statements do not allow a precise calculation of revenue or profit per node.
Does TSMC design its own chips?
TSMC develops manufacturing processes and related technologies, but it says it does not design, manufacture or market semiconductor products under its own name. The chips it fabricates are based on customer-provided designs. That is why TSMC is generally described as a pure-play foundry rather than a chip-product company.
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This does not mean TSMC has no engineering role. It must design and improve the manufacturing process, create design rules, qualify equipment, support customers’ implementation work and develop packaging technologies. The customer, however, owns the chip product concept and supplies the circuit design that TSMC manufactures.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Why the foundry model matters to chip designers
Building a modern fab requires factories, specialized equipment, process-development teams, clean-room operations and a large, continuing investment. Outsourcing fabrication lets a design company focus its resources on architecture, software, product integration and sales while buying manufacturing as a service.
The trade-off is dependence on the foundry’s availability and execution. A customer must align its design with the foundry’s process rules, secure capacity and manage the risk that a production problem or shortage delays its product. Switching a finished design to another process is not usually a simple supplier change; it can require substantial redesign, requalification and testing.
For TSMC, serving many customers creates diversification across products and end markets, while scale helps support the cost of process development. It also creates exposure to broad semiconductor cycles: weak demand can reduce orders, while a sudden boom can leave customers competing for limited capacity.
How to read TSMC’s financial disclosures
Start with the fiscal period
The figures above cover the year ended December 31, 2025. Compare later results only with matching fiscal periods and make clear whether a number is reported in New Taiwan dollars or translated into U.S. dollars. Exchange-rate translations are not the same as a separate U.S.-dollar revenue stream.
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Separate revenue from profit
Net revenue measures sales. Net income attributable to shareholders measures the profit remaining for the parent company’s shareholders after expenses, financing, taxes and other items. A high-revenue process or customer is not automatically the highest-margin one.
Do not treat technology mix as unit share
The 74% advanced-process statistic and 24% 3nm statistic are percentages of wafer revenue. They cannot be used to infer the percentage of wafers, chips, customers or profit represented by those technologies.
Look for capacity and timing qualifiers
“More than 17 million 12-inch-equivalent wafers” is annual capacity, while “2nm entered high-volume manufacturing in the fourth quarter of 2025” is a production milestone. Neither number forecasts future revenue by itself. Expansion schedules, customer qualification and demand determine how quickly capacity becomes sales.
What is not publicly established by these figures
TSMC’s aggregate disclosures do not establish customer-specific wafer prices, contract terms or profit margins by process node. They also do not provide a like-for-like competitor dataset that would prove which foundry is larger, more profitable or technologically ahead on a particular measure. Any such conclusion requires comparable filings and consistent definitions for capacity, revenue, geography, technology and fiscal year.
The most defensible conclusion from the 2025 disclosures is narrower: TSMC earns most of its revenue by manufacturing customer-designed chips, supplements that income with related services, and relies on scale and process technology to attract and retain production programs.
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