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TSMC vs. Samsung Foundry: How Their Chipmaking Businesses Compare in 2025–2026

By TheFinanceBase Team 10 min read

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TSMC and Samsung Foundry are major advanced-chip manufacturers, but they are not the same kind of business. TSMC is a dedicated, pure-play foundry that manufactures customers’ designs and does not sell chips under its own brand. Samsung Foundry is one business inside Samsung Electronics, alongside memory, logic products and advanced packaging. That difference affects how customers buy capacity, how each company reports its scale, and how its technology strategy is presented.

TSMC supplies foundry-specific figures such as 2025 wafer shipments, annual capacity, customer count and process-revenue mix. Samsung’s widely reported 2025 revenue, operating profit and research spending cover Samsung Electronics as a whole, not Samsung Foundry alone. The figures therefore show why TSMC appears easier to measure as a foundry, not that Samsung Foundry is smaller by a specific amount.

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TSMC and Samsung Foundry at a glance

Dimension TSMC Samsung Foundry
Business model Pure-play foundry focused on manufacturing customers’ designs Foundry business within Samsung Electronics’ integrated semiconductor portfolio
2025 reported revenue US$122.42 billion consolidated TSMC revenue KRW 333.6 trillion consolidated Samsung Electronics revenue
2025 wafer shipments 15.0 million 12-inch-equivalent wafers Foundry-only shipments were not stated in the cited 2025 company materials
Annual manufacturing capacity More than 17 million 12-inch-equivalent wafers in 2025 Foundry-only capacity was not stated in the cited 2025 company materials
Customer and technology disclosure 534 customers, 305 distinct process technologies and 12,682 products in 2025 Samsung described an expanding AI/HPC customer portfolio and major 2-nanometer customers, without an equivalent foundry-only customer count
Advanced-process mix 74% of 2025 wafer revenue came from 7-nanometer-and-more-advanced technologies; 3-nanometer alone represented 24% No directly comparable foundry-only process-revenue mix was provided in the cited materials

The practical distinction is straightforward: a company choosing a manufacturing partner can evaluate TSMC through a large set of foundry-specific disclosures, while Samsung’s public headline numbers combine several semiconductor and non-semiconductor businesses.

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The business-model difference

TSMC’s pure-play foundry model

TSMC says it pioneered the pure-play foundry model. It focuses on making customers’ semiconductor designs rather than designing, manufacturing and marketing chips under its own name. In its 2025 annual report, Chairman and Chief Executive Officer C.C. Wei described the company’s responsibility this way: “As a Foundry, our biggest responsibility is to support our customers with the most advanced technologies and necessary capacity to unleash their innovations.”

For a chip designer, this structure creates a focused supplier relationship. TSMC’s process-development, capacity-planning and ecosystem disclosures are organized around serving external customers across smartphones, high-performance computing, automotive, Internet of Things and specialty applications. The model does not guarantee a particular price, yield or delivery date, but it makes the company’s strategic purpose unambiguous: manufacture other companies’ designs at scale.

Samsung Foundry’s integrated portfolio

Samsung Foundry operates within Samsung Electronics. Samsung’s 2025 shareholder letter presents logic, memory, foundry and advanced packaging as parts of a broader semiconductor group. A customer can therefore view Samsung not only as a wafer manufacturer but also as a potential supplier of memory and packaging capabilities through the wider organization.

The integrated structure is a portfolio advantage when a project benefits from coordinated logic, memory and packaging work. It should not, however, be treated as proof that Samsung automatically has a customer conflict; the cited company materials do not establish such a conclusion. The defensible comparison is one of focus versus breadth: TSMC is organized exclusively around the foundry role, while Samsung combines foundry with other semiconductor businesses.

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Scale and financial reporting: what the numbers actually measure

TSMC’s foundry-specific scale

TSMC reported 15.0 million 12-inch-equivalent wafer shipments in 2025 and more than 17 million 12-inch-equivalent wafers of annual manufacturing capacity. Shipments measure what left factories during the year; capacity describes potential annual output. Capacity is therefore not the same as shipments, utilization or guaranteed availability for a particular customer.

The same 2025 reporting lists 305 distinct process technologies, 12,682 products and 534 customers. TSMC also reported that 74% of wafer revenue came from 7-nanometer-and-more-advanced technologies, using its own definition of the advanced category, and that 3-nanometer technology accounted for 24% of wafer revenue. Those percentages describe revenue mix, not the share of physical wafers or a direct measure of profitability.

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Samsung’s headline figures are company-wide

Samsung Electronics reported KRW 333.6 trillion in consolidated revenue and KRW 43.6 trillion in consolidated operating profit for 2025. It also reported KRW 37.7 trillion of company-wide research and development investment. These figures include Samsung Electronics’ businesses beyond foundry, so they cannot be relabeled as Samsung Foundry revenue, operating profit or R&D.

The reviewed 2025 Samsung materials do not provide a directly comparable standalone Samsung Foundry profit figure. It is therefore not valid to subtract or estimate a foundry result from Samsung Electronics’ consolidated numbers, nor to present an outside estimate as an audited company fact. A comparison of financial size must keep consolidation scope, currency and fiscal year attached to every number.

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Reported 2025 measure TSMC Samsung Electronics How to read it
Revenue US$122.42 billion consolidated revenue KRW 333.6 trillion consolidated revenue Different currencies and organizational scopes; not a foundry-versus-foundry comparison
Operating profit Not used here because the cited comparison materials do not provide a matching Samsung Foundry figure KRW 43.6 trillion consolidated operating profit Samsung figure covers the whole company
Research and development Not paired with a comparable Samsung Foundry-only figure in the cited materials KRW 37.7 trillion company-wide R&D investment Samsung figure is not foundry-only
12-inch-equivalent wafer activity 15.0 million shipments; more than 17 million annual capacity Foundry-only shipments and capacity were not stated in the cited materials TSMC’s figures are directly tied to its foundry operations

Process technology and roadmap status

TSMC’s reported milestones

TSMC’s 2025 annual report states that its N2, or 2-nanometer, process entered high-volume manufacturing in the fourth quarter of 2025. It scheduled N2P and A16 volume production for the second half of 2026 and A14 for 2028. The first statement describes a completed company-reported production milestone; the latter dates are company plans and can change.

TSMC also highlights advanced packaging and three-dimensional integration, including CoWoS, InFO and SoIC. These technologies matter because modern AI and high-performance-computing systems increasingly combine multiple dies, high-bandwidth memory and complex package-level connections rather than relying on one large monolithic die.

Samsung’s GAA and 2-nanometer claims

Samsung’s 2025 shareholder letter says its foundry business advanced gate-all-around (GAA) process technology, refined mature-node offerings, expanded its AI and HPC customer portfolio and secured major customers for 2-nanometer processes. Those are company statements about technology progress and customer activity. The letter does not provide an apples-to-apples comparison with TSMC’s reported high-volume-manufacturing date, nor does it establish equivalent yield, performance, power, volume or named-customer results.

Roadmap item TSMC statement Samsung Foundry statement
2-nanometer status N2 high-volume manufacturing began in the fourth quarter of 2025 2025 shareholder letter describes GAA advances and major 2-nanometer customers; it does not state an equivalent high-volume-production date in the cited material
Near-term follow-ons N2P and A16 volume production scheduled for the second half of 2026 No matching dated follow-on schedule stated in the cited material
Longer-term node A14 volume production scheduled for 2028 No matching dated A14-style schedule stated in the cited material
Packaging CoWoS, InFO and SoIC advanced packaging and 3D-stacking technologies Wider Samsung group positioned around memory, foundry and advanced packaging

Why node labels do not settle the comparison

“2 nanometer” is a company process-generation label, not a direct measurement proving that every physical feature on one company’s wafer is 2 nanometers or that two suppliers’ nodes are equivalent. A useful procurement comparison needs more than the label: design-rule documentation, power and performance targets, library availability, production maturity, yield, wafer pricing, packaging compatibility and customer adoption.

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The cited official materials do not support a direct relative-yield claim, a universal performance ranking or an exact market-share comparison. A company can report that a process is in production, that customers are engaged or that a roadmap is planned without those statements proving identical maturity between suppliers.

Where demand is coming from

AI and high-performance computing

AI and HPC are central priorities for both businesses. TSMC links advanced technologies to high-performance computing alongside smartphones, automotive and IoT products. Samsung says its foundry customer portfolio expanded in AI and HPC and presents the combination of memory, foundry and advanced packaging as a way to address data-intensive systems.

Samsung’s FY2025 business report characterizes advanced-node demand for AI and HPC as strong while describing mature-node growth as stagnant amid intensified price competition, particularly in China. That is Samsung’s description of market conditions, not an independent industry forecast. It does, however, explain why both companies emphasize leading-edge capacity while continuing to maintain mature processes for automotive, connectivity, display-driver and other products.

Specialty and mature technologies

Leading-edge nodes attract attention, but many chips remain on mature or specialty processes because their designs prioritize analog performance, high voltage, embedded nonvolatile memory, radio-frequency functions, reliability or low cost. TSMC explicitly reports a portfolio spanning advanced and specialty technologies. Samsung says it refined mature offerings while developing GAA, indicating that its foundry strategy also extends beyond the newest node.

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For a customer, the relevant question is not simply which supplier announces the smallest node. It is whether the supplier has the exact process option, qualified design rules, intellectual-property libraries, packaging path and long-term capacity needed for the product’s life cycle.

Packaging and ecosystem considerations

Advanced packaging increasingly determines system performance. TSMC’s named CoWoS, InFO and SoIC technologies cover high-performance interconnect, fan-out approaches and three-dimensional integration. Their relevance is especially clear for AI accelerators, where logic dies must connect efficiently to large amounts of memory.

Samsung describes a broader memory-foundry-packaging proposition. That integrated positioning can appeal to a system designer seeking coordinated access to logic manufacturing, memory and package assembly. The available company statements do not establish that one packaging approach is universally faster, cheaper or more available than the other. Package choice remains design-specific and depends on die size, memory type, thermal limits, interconnect bandwidth, qualification requirements and expected volume.

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Manufacturing footprint and expansion

TSMC’s disclosed sites and schedules

TSMC reports operations and projects in Taiwan, the United States, Japan and Germany. Its first Arizona fab entered high-volume production in the fourth quarter of 2024. The company expected its second Arizona fab to enter high-volume manufacturing in the second half of 2027, and it reported that construction of a third Arizona fab began in 2025.

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In Japan, Japan Advanced Semiconductor Manufacturing’s first fab began volume production at the end of 2024, while work on a second fab began in 2025. A specialty fab in Dresden, Germany, was under construction. These milestones are not interchangeable: some describe operating production, while others describe construction or an expected future start.

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What is and is not established for Samsung

The Samsung materials used for this comparison establish a broad semiconductor strategy that combines memory, logic, foundry and advanced packaging. They do not provide a similarly detailed, site-by-site foundry capacity and schedule table. That asymmetry in public detail should not be interpreted as evidence that Samsung lacks overseas manufacturing capacity; it means the cited disclosures do not support a like-for-like geographic inventory.

How a chip company should choose between them

Neither company can be declared the best foundry for every design from the cited information. A practical evaluation should follow the project’s constraints.

  1. Define the product’s process requirement. Establish whether the design needs a leading-edge logic node, a mature process, analog or radio-frequency options, embedded memory, high-voltage capability or another specialty feature.
  2. Check production status. Separate a process already in high-volume manufacturing from a customer announcement, qualification phase or future roadmap date. Ask for the applicable production site and expected ramp.
  3. Map the design ecosystem. Verify process-design kits, standard-cell libraries, interface IP, electronic-design-automation support and the porting effort from the current node. A nominally similar node can still require substantial redesign.
  4. Evaluate packaging as part of the chip. For AI, HPC and other multi-die products, compare available package architectures, memory integration, thermal design, interconnect bandwidth and allocation of package capacity.
  5. Reserve realistic capacity. TSMC’s reported capacity exceeds 17 million 12-inch-equivalent wafers annually, but that is company-wide capacity rather than a guarantee for one program. Ask either supplier about the specific fab, wafer start schedule, ramp assumptions and allocation protections.
  6. Assess geographic and qualification needs. Some products require manufacturing in a particular country or a second source for resilience. Match the project’s qualification rules to the sites that are operating, under construction or merely planned.
  7. Compare economics on a matched basis. Request wafer price, mask costs, nonrecurring engineering, test and packaging charges, minimum volumes, yield assumptions and engineering support under the same design and volume scenario. Public consolidated revenue cannot answer those questions.
  8. Review the whole-company fit. TSMC offers a focused foundry relationship. Samsung can offer an integrated portfolio spanning memory, logic, foundry and packaging. Decide whether that breadth solves a real system problem rather than assuming integration is automatically superior.

Claims the public figures cannot prove

  • TSMC’s US$122.42 billion consolidated revenue cannot be directly compared with Samsung Electronics’ KRW 333.6 trillion consolidated revenue to determine which foundry is larger.
  • Samsung Electronics’ KRW 43.6 trillion operating profit is not Samsung Foundry operating profit.
  • TSMC’s more than 17 million wafer capacity does not show utilization, customer allocation or guaranteed access for a new design.
  • Node names alone do not prove equal transistor density, performance, power efficiency or yield.
  • The cited materials do not establish a direct relative yield ranking, exact foundry market share, wafer-price ranking or universal customer preference.
  • Samsung’s statements about major 2-nanometer customers do not provide enough detail to compare customer volume or production maturity with TSMC.

Bottom line

TSMC is the easier company to analyze as a foundry because its business model and disclosures are dedicated to external chip manufacturing. Its 2025 report provides foundry-specific scale, customer, process-mix and capacity figures, and it states that N2 high-volume manufacturing began in the fourth quarter of 2025. Samsung Foundry belongs to a much broader Samsung Electronics portfolio and emphasizes GAA development, AI/HPC customers, mature-node offerings and a memory-foundry-packaging combination. Its headline financial figures are consolidated, and the cited materials do not provide a comparable standalone foundry profit or capacity measure.

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For a real chip program, the decision should rest on the required process, production maturity, design ecosystem, packaging route, capacity commitment, geography and total program economics—not on a headline revenue comparison or a node number by itself.

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