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Synopsys announced on November 11, 2020, that it had acquired Moortec, a specialist in embedded process, voltage and temperature (PVT) monitoring. The financial terms were not disclosed, and Synopsys said they were not material to its financial results.
The strategic significance was larger than the transaction’s reported financial impact: Moortec’s sensor technology gave Synopsys a stronger measurement layer for its emerging Silicon Lifecycle Management (SLM) strategy—an effort to connect chip design and verification with manufacturing, test, bring-up and operation in the field.
The acquisition in brief
Moortec developed in-chip monitoring technology, particularly PVT sensors and related control subsystems. Synopsys said Moortec’s technology had been used on hundreds of chip designs and across process nodes down to 5nm. Those figures are claims from the acquisition announcement, not independently audited market statistics. The announcement also said the terms were undisclosed and not material to Synopsys’ financials.
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1Fix the driver behind crashes, sound loss and screen glitches2Repair Windows errors before they cause bigger problems3Scan for outdated or missing drivers - takes under a minuteSynopsys positioned the acquisition as a way to add embedded silicon telemetry to its SLM platform. The basic architecture is:
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- Automatic identification of components automatic identification of connection pins identification of particularities such as detection of protection diodes and detection of shunt resistors bipolar transistors: measurement of current gain and leakage current, silicon and germanium diode detection measurement of threshold voltage for enhancement MOSFETs measurement of forward voltage for diodes, LEDs, and base-emitter junctions of transistors exti
- Specification Summary at 68°F (20°C) unless otherwise specified
- Short circuit peak current cut: -5.5 mA up to 5.5 mA
- Permanent short circuit peak voltage: -5.1 V up to 5.1 V
- Transistor:
embedded sensors → data collection → analytics → engineering or system-level action
The deal therefore was not simply a purchase of temperature sensors. It was an attempt to strengthen Synopsys’ ability to connect design intent with what manufactured and deployed silicon actually does.
Synopsys’ announcement described lifecycle coverage extending from design implementation through manufacturing, production test, silicon bring-up and in-field operation.
Why chips need visibility after tape-out
A chip can meet its simulated specifications and still behave differently from another chip built from the same design. Process variation affects transistor performance and leakage. Voltage droop can vary by location and workload. Thermal conditions can differ across blocks. Aging, power-management decisions and software activity can change operating margins after deployment.
Board-level measurements are useful but may not show the conditions experienced by a particular block or circuit. Sensors placed inside or near the relevant circuitry can provide more localized information about:
- temperature and thermal gradients;
- voltage supply behavior and droop;
- process-related variation;
- performance margins and operating conditions; and
- changes associated with workload, aging or reliability stress.
This information can support characterization, binning, debug, yield learning, reliability analysis and adaptive control. PVT monitoring does not solve advanced-node variability by itself. Its usefulness depends on sensor placement, calibration, access, analytics and whether the system can act on the measurements.
What Moortec brought to Synopsys
Moortec’s core contribution was environmental and physical-condition monitoring embedded in the SoC. That should be distinguished from two related but different categories:
| Monitoring type | What it observes | Typical value |
|---|---|---|
| PVT monitoring | Process conditions, voltage and temperature | Physical-margin tracking, characterization, optimization and reliability analysis |
| Functional monitoring | What the SoC, processor, interconnect or software workload is doing | Debug, performance analysis, safety and security monitoring |
| Structural monitoring and DFT | Manufacturing-oriented circuit behavior and test results | Defect detection, screening, yield learning and diagnosis |
These categories complement one another. A voltage sensor may show that a block experienced droop, while functional instrumentation may help explain which workload caused it and structural test data may reveal whether the behavior is associated with a manufacturing pattern.
Silicon Lifecycle Management explained
SLM is broader than ordinary manufacturing test. It is a data and instrumentation approach that follows silicon through several stages:
- Design implementation: engineers select and place monitors, model expected behavior and plan access and control infrastructure.
- Manufacturing: measured silicon behavior can be compared with process information to identify systematic variation or excursions.
- Production test: telemetry can contribute to characterization, screening, binning, yield learning and failure analysis.
- Silicon bring-up: real measurements can be compared with simulation and design expectations during early hardware validation.
- In-field operation: deployed devices can be monitored for thermal stress, aging, workload-dependent behavior and emerging reliability issues.
In principle, this creates a feedback loop between design assumptions and silicon reality. In practice, the quality of that loop depends on data correlation, software, access speed, calibration, security and the customer’s ability to respond.
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Why Synopsys wanted the sensor layer
Traditional EDA value is concentrated before manufacturing: design creation, simulation, verification, synthesis, physical implementation and signoff. Embedded monitoring extends the information flow into physical silicon.
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- Better design feedback: measured behavior can expose differences between models and manufactured devices.
- Yield and test learning: sensor data can be correlated with wafer, test and production records.
- Faster bring-up: engineers can investigate voltage, thermal and timing behavior under real conditions.
- Reliability insight: long-term trends may help identify aging or stress-related behavior.
- Runtime optimization: systems may adjust voltage, frequency, workload scheduling or thermal policy when the design supports such responses.
Owning or integrating sensor IP also matters because equivalent visibility is difficult to add after fabrication. Monitor placement, routing, access and verification must generally be planned as part of the SoC design.
However, the 2020 announcement described a strategic direction, not a fully specified, closed-loop commercial product. It did not disclose quantified yield improvements, reliability gains, customer contracts, integration milestones or product availability dates.
Synopsys versus Siemens and Mentor
The timing reflected a broader EDA competition. Siemens announced its agreement to acquire UltraSoC on June 23, 2020, several months before Synopsys announced the Moortec deal. Siemens planned to combine UltraSoC’s embedded monitoring and analytics with Mentor’s Tessent portfolio.
The difference was one of emphasis and heritage, not a simple split between “hardware” and “software.”
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- 【Fully Automatic Operation Design, Easy for Beginners】 3 probes connect to pins (2 for 2-pin). Auto power-off unattended. Simple, intuitive, no professional background needed
- 【Short-Circuit Test Current Protection】Its test current into a short circuit is - 5.5mA up to 5.5mA. This limit prevents excessive current from damaging the instrument or the tested components during short-circuit conditions
- 【Output Voltage Rating Constraint】The device’s output is constrained by the - 5.1V up to 5.1V voltage rating to prevent excessive voltage stress on internal circuits and tested components
- 【Durable Design and Maintenance, Ensuring Stable Use】 Compact, shock-resistant. Replace yearly, auto low-battery prompt. Power-on self-test with fault code for troubleshooting, extending life
| Synopsys and Moortec | Siemens, Mentor and UltraSoC | |
|---|---|---|
| Initial center of gravity | PVT and environmental sensing | Functional embedded instrumentation and analytics |
| Adjacent strengths | Design implementation, advanced-node optimization and lifecycle analytics | DFT, yield learning, debug, safety and security |
| Lifecycle ambition | Design through manufacturing, bring-up and field operation | “Fab-to-field” visibility and post-deployment analysis |
| Current portfolio context | In-Chip Monitoring Subsystem, identified as formerly Moortec technology | Tessent offerings spanning DFT, yield learning, embedded analytics, safety, security and in-life monitoring |
Contemporary EE Times coverage characterized Synopsys’ positioning as emphasizing advanced analytics. That is an attributed industry description, not an independently measured performance comparison.
Siemens’ current Tessent Silicon Lifecycle Solutions materials describe a similarly broad lifecycle scope, while its Embedded Analytics offering emphasizes functional monitoring, real-time and post-deployment analysis, and system-level visibility.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What the economics do—and do not—tell us
The undisclosed purchase price limits financial analysis. Synopsys said the terms were not material to its financials, but that does not mean the technology lacked strategic value. It means the transaction was not expected to have a material effect on the company’s reported financial position under the announcement’s disclosure.
There was no public acquisition-day figure for revenue contribution, return on investment, customer adoption, yield improvement or reliability improvement. Any claim that the deal immediately produced those outcomes would go beyond the available evidence.
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The commercial decision for chip companies is also not a conventional consumer software purchase. Synopsys SLM and Siemens Tessent are enterprise EDA and semiconductor-IP offerings generally evaluated through vendor sales channels, technical qualification and integration planning. The relevant comparison may include licensing, foundry enablement, engineering services, data infrastructure and long-term support—not merely a tool subscription price.
Implementation constraints
Embedded visibility has costs and trade-offs:
- Area and power: sensors, management logic, routing, storage and access circuitry consume silicon resources.
- Calibration: readings must be interpreted against process and operating conditions, and drift can undermine conclusions.
- Placement: a sensor may not represent a distant hotspot or an unrelated block.
- Data volume: continuous telemetry can create storage, bandwidth and analysis requirements.
- Tool integration: monitors must be inserted, verified, accessed and correlated with design and test data.
- Security: field telemetry can reveal workload or system-state information and requires access control.
- Safety: automotive and other safety-critical applications require appropriate diagnostics, fault handling and process compliance.
- Actionability: measurements matter only when firmware, hardware or manufacturing processes can respond safely.
- Vendor dependence: a deeply integrated platform can simplify deployment while increasing lock-in and reducing flexibility.
A company evaluating an SLM platform should therefore ask whether it supports the required monitor types, process nodes, foundry technologies, design flows, DFT or access standards, analytics workflows, safety requirements and data APIs. It should also ask who owns the resulting data and whether the organization has the engineering and data-science resources to use it.
What changed after the acquisition?
Current Synopsys material identifies its In-Chip Monitoring Subsystem as “formerly Moortec technology.” The current Synopsys datasheet lists distributed PVT sensing, thermal sensors, process monitors, voltage-supply monitors, extended sensors, a Sensor Management Hub, management processing, connection fabric and digital interface wrappers.
It also lists technology availability from 28nm down to 3nm. That is a current product-material claim and should not be backdated as though it were the specification announced in November 2020. Likewise, the 2020 reference to support down to 5nm should be treated as a historical claim from Synopsys, not as a substitute for current qualification details across every foundry, process or design.
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Synopsys acquired Moortec because sensors are the source of the data required for Silicon Lifecycle Management. The strategic prize was not merely a portfolio of PVT monitors; it was a stronger position in the measurement-and-analytics loop connecting design, manufactured silicon and deployed systems.
The deal also showed where semiconductor EDA was heading in 2020: beyond predicting how chips should behave toward measuring how they actually behave. Synopsys’ approach began with environmental sensing, while Siemens’ Tessent strategy combined DFT and functional instrumentation with analytics, safety, security and in-life monitoring. Neither approach makes telemetry automatically useful. The competitive advantage depends on coverage, integration, data quality and the ability to turn measurements into safe, economically valuable decisions.
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