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Baya Systems announced a Series B financing of more than $36 million on January 23, 2025. Maverick Silicon led the round, with strategic investment from Synopsys and continued participation from Matrix Partners and Intel Capital. Baya says it will use the funding to expand operations, accelerate product development, and increase deployment of its software-driven system IP for AI, SoC, and chiplet designs.
The financing matters because the next generation of AI hardware is increasingly limited by how efficiently data moves among processors, memory, accelerators, and chiplets—not simply by the amount of compute available.
What Baya Systems does
Baya Systems develops semiconductor design software and interconnect IP for complex systems-on-chip and multi-die systems. Its two main offerings are WeaverPro, a software-based architecture and analysis platform, and WeaveIP, a configurable interconnect and fabric IP portfolio.
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In practical terms, Baya is targeting the infrastructure that connects CPUs, GPUs, AI accelerators, memory controllers, I/O blocks, and chiplets inside an advanced computing system.
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What happened in the Series B
| Detail | Information |
|---|---|
| Announcement date | January 23, 2025 |
| Round | Series B |
| Amount | More than $36 million |
| Lead investor | Maverick Silicon |
| Strategic investor | Synopsys |
| Returning investors | Matrix Partners and Intel Capital |
Baya’s official announcement describes the financing as “$36+ million,” so “more than $36 million” is more precise than presenting the round as exactly $36 million. The company did not disclose the amount invested by each participant, its valuation, or the financing’s detailed terms. Baya’s announcement says the proceeds will support operational growth, product development, and broader deployment of its system IP portfolio.
Why chiplets matter for AI hardware
A chiplet-based design divides a large system into multiple dies or functional blocks rather than placing every component on one monolithic piece of silicon. A package might combine CPU chiplets, AI accelerators, memory controllers, I/O dies, and specialized third-party IP.
This approach can give chip designers more flexibility. Different functions may use different manufacturing processes, proven blocks can be reused, and companies can combine components from multiple sources. But chiplets also create difficult system-level engineering problems:
- Moving data between dies with sufficient bandwidth and low latency.
- Maintaining coherency when multiple processors access shared data.
- Managing power, heat, packaging, and physical-interface constraints.
- Verifying many combinations of traffic, errors, resets, and operating conditions.
- Making heterogeneous IP blocks and protocols work together.
AI workloads make these issues particularly important because accelerators can process data faster than the surrounding memory and interconnect system can supply it. Adding more compute does not automatically improve performance if the fabric, memory system, or die-to-die links become bottlenecks.
WeaverPro: software for architecture exploration
Baya describes WeaverPro as a software-driven platform for system architecture and microarchitecture development. The company says it supports workload analysis, architecture exploration, simulation, performance and KPI analysis, cache and memory planning, fabric design, and refinement from early specifications through post-silicon tuning.
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Later product materials identify CacheStudio and FabricStudio as components within the WeaverPro platform. The intended workflow is to let architects examine traffic patterns and system choices before committing fully to RTL and physical implementation, then use the analysis throughout later design stages.
That approach could help teams compare alternatives such as cache organization, memory hierarchy, traffic routing, bandwidth allocation, and coherency behavior. However, these are product capabilities described by Baya; the available sources do not establish independent benchmarks showing how WeaverPro compares with every competing architecture tool.
Read Baya’s WeaverPro product brief.
WeaveIP: interconnect and fabric IP
WeaveIP is Baya’s configurable system interconnect and fabric IP portfolio. Baya says it supports coherent and non-coherent fabrics, distributed caching, custom and standard protocols, a common transport architecture, and chiplet-ready multi-die designs.
The company also positions WeaveIP around optimization of performance, latency, power, and silicon footprint. Those goals are central to AI-chip design, but they should be understood as vendor-described capabilities rather than independently verified performance results. Actual outcomes would depend on the target process node, physical interfaces, packaging, workload, topology, and implementation choices.
WeaverPro and WeaveIP address different parts of the design process. WeaverPro is the software and analysis environment; WeaveIP is the implementation-oriented fabric and interconnect IP. Baya’s broader pitch is that the two can form a connected architecture-to-implementation workflow.
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Where UALink fits
Baya has said its modular solutions support or comply with emerging standards such as Ultra Accelerator Link, or UALink. UALink is an industry interconnect initiative intended to help scale communication among AI accelerators. It is not a technology created or controlled by Baya.
The distinction matters because UALink is part of a wider semiconductor-IP market. For example, Synopsys markets UALink controller, PHY, and verification IP. That makes Synopsys’ investment in Baya strategically interesting, while the public announcements do not establish that Synopsys distributes Baya products or that the companies have an exclusive relationship.
Customer and ecosystem evidence
The clearest customer evidence available around the Series B announcement involved Tenstorrent. Baya announced that Tenstorrent had licensed its fabric technology for AI and RISC-V chiplet solutions in June 2024. That is more meaningful than a general partnership announcement because it indicates a licensing relationship, although the public materials do not disclose the contract’s value, production volume, or resulting revenue.
Baya also said it had emerged from stealth, delivered its flagship product, and secured additional customers or partnerships that were not publicly named. VentureBeat reported that the company had approximately 50 employees and that management aimed to quadruple bookings and revenue by the end of 2025. Those were company targets reported by the publication, not independently verified results. Read VentureBeat’s coverage.
Subsequent company announcements provide additional evidence of continued ecosystem activity:
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- In September 2025, Baya and Tenstorrent announced interoperability work involving Baya’s WeaveIP and Tenstorrent’s TT-Ascalon processor portfolio. Baya also said it had joined the Open Chiplet Atlas ecosystem. See the announcement.
- In July 2026, Baya announced that Kandou AI had licensed WeaveIP and WeaverPro for next-generation connectivity platforms. See Baya’s announcement.
These later disclosures should not be treated as information known when the January 2025 funding was announced. They do, however, suggest that Baya continued pursuing customer and ecosystem relationships after the financing.
Management and technical background
Baya’s leadership and founding team have backgrounds at companies including Apple, AMD, Arm, Intel, and Qualcomm. Chairman Jim Keller is a prominent semiconductor architect associated with work at AMD, Apple, Tesla, Intel, and other technology companies.
That experience is relevant to the company’s credibility and network, but it does not independently prove product performance, production deployment, revenue, or market share. Those outcomes require separate evidence.
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Arteris and NoC IP
Arteris is a significant comparison point in network-on-chip and coherent interconnect IP. Tenstorrent has publicly disclosed relationships with Arteris for AI, high-performance computing, and chiplet-based RISC-V systems. Arteris’ announcement documents one of those relationships.
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This means Baya should not be presented as Tenstorrent’s only interconnect supplier or as an automatic replacement for Arteris. The companies overlap in fabric and interconnect categories, but Baya emphasizes a software-driven architecture-to-fabric workflow while Arteris has an established NoC and interconnect IP business.
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Synopsys and other EDA suppliers
Synopsys’ investment gives Baya strategic validation and places the company near a much larger EDA and semiconductor-IP ecosystem. At the same time, Synopsys supplies adjacent interface IP, including UALink-related products. The public funding announcement does not clarify whether Synopsys’ role is primarily financial, strategic, commercial, or ecosystem-oriented.
Internal development
Large semiconductor companies may build their own fabrics to preserve control and product differentiation. An in-house approach can provide maximum customization, but it also requires more engineering, verification, maintenance, and long-term support. Baya’s opportunity is to offer reusable infrastructure and architecture tools without requiring every chip company to develop an interconnect stack from scratch.
Design-service firms
Companies such as Aion Silicon may be relevant when a buyer needs architecture, integration, ASIC design, or implementation assistance in addition to licensed IP. Aion is a services partner rather than a direct substitute for Baya’s software and fabric products. Baya announced a partnership with Aion in February 2026. Read the partnership announcement.
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The Series B demonstrates that Maverick Silicon, Synopsys, Matrix Partners, and Intel Capital were willing to finance Baya’s strategy. It does not by itself prove profitability, production volume, market share, or a particular return for investors.
The available disclosures do not establish:
- Baya’s revenue, valuation, or profitability.
- The exact amount invested by each participant.
- The number of paying customers.
- Public pricing, licensing fees, royalties, or support costs.
- Independent measurements of latency, bandwidth, power, area, or workload performance.
- How many customer designs have reached production silicon.
- Whether the company met its reported 2025 bookings and revenue targets.
For a prospective semiconductor customer, the important diligence questions include process-node and foundry support, PHY dependencies, protocol coverage, coherent and non-coherent traffic, verification collateral, integration with existing EDA flows, post-silicon support, licensing structure, and measured performance under a comparable workload.
Bottom line for technology and investment readers
Baya Systems is attempting to commercialize a software-plus-IP approach to one of the hardest parts of modern AI hardware: moving and managing data across processors, memory, accelerators, and chiplets. Its more-than-$36 million Series B, led by Maverick Silicon with Synopsys, Matrix Partners, and Intel Capital participating, gives the company additional resources to pursue that market.
The strongest disclosed evidence is Tenstorrent’s licensing relationship, followed by later announcements involving TT-Ascalon interoperability, Open Chiplet Atlas, and Kandou AI. Still, the investment should be viewed as backing for a promising semiconductor infrastructure strategy—not proof that Baya has already achieved broad production adoption or independently demonstrated superior performance.
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