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In early November 1997, Altera completed its move into a company-owned headquarters campus in San Jose, California. The four-building complex brought staff together from several leased offices and added room for expansion; it was designed for office and product-test work, not reported as a semiconductor fabrication plant.
The move at a glance
| When | Early November 1997. The EE Times report carries a Nov. 3 dateline; its page displays the date as “11.05.1997.” |
|---|---|
| Where | Innovation Drive, between North First Street and Zanker Road, San Jose, California. |
| Campus | About 25 acres, with four custom-designed, multistory buildings and roughly 500,000 square feet of office and product-test space. |
| People | About 900 employees initially, out of almost 1,100 worldwide; capacity was planned for as many as 2,000. |
| Project team | RMW Architects; Rudolph and Sletten, general contractor. |
EE Times called it Altera’s fourth headquarters since the company was founded in 1983—and its first headquarters facility that it owned. The report describes the move as completed, rather than merely announcing a future project. Read the contemporaneous EE Times report.
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Why Altera consolidated its offices
Before the move, headquarters employees were spread among leased buildings roughly half a mile apart. The new campus put those staff in one location and replaced the leased-headquarters arrangement with an owned facility. Its planned capacity also gave Altera space to grow: the company expected the site to accommodate up to 2,000 employees over the following three to five years.
That is the documented rationale: consolidation, ownership and room for anticipated growth. Bringing employees together may have supported closer day-to-day coordination, but the available reports do not measure whether the move improved productivity, innovation or company performance. Nor do they say that all of Altera’s worldwide employees relocated; about 900 of nearly 1,100 were based at the campus at the time.
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- Altera Cyclone IV FPGA includes 6,000 Logic Elements with two clock multipliers. The Cyclone IV FPGA is the perfect balance of inexpensive cost versus plentiful logic cells, 20KBytes of SRAM, and General Purpose Input/Output pins. This is a great board to learn how to program FPGA's.
- Built in programmer cable allows configuring the FPGA with a single USB-C cable. The DPL can be powered from the USB cable or from the Barrel Connector. A separate JTAG header can also be used to program the FPGA using a compatible USB Blaster cable.
- 6x6 LED Array allows character and animations to be displayed at ultra fast speed. LED blocks can be individually turned on/off to allow LED signals to be used as I/O's
- 70 Inputs/Outputs originating at the FPGA are available at Stackable Headers organized around the edge of the board. The user can configure these I/O's using the FPGA project code.
- The DPL contains two oscillators, 66MHz and 100MHz. The 66MHz oscillator is used to provide clocking for the EPT ActiveHost USB communications core. The 100MHz oscillator can be used by the user clocked up using one of the onboard Clock-DLL modules.
What the campus contained
The complex combined office space with product-test facilities. Four multistory buildings were linked by fully enclosed pedestrian bridges. Reported amenities included park-like landscaping, a full-service cafeteria with seating for 350, a fitness center and an auditorium with a sloped floor, video wall and extensive audiovisual equipment.
EE Times also reported more than 5,000 miles of wire and cable installed within and between the buildings. That is the newspaper’s reported project figure; the article does not explain its counting method or break the total down by cable type. It should not be read as a measure of any particular network, electrical or manufacturing system.
Construction figures and design
According to EE Times, the project took two years from design through construction, with 14 months between groundbreaking and move-in. The report gives these construction quantities:
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- The CycloFlex includes Three Seven Segment Displays which are directly drivable from FPGA I/O pins. 65 Inputs/Outputs from the FPGA available at board connectors. There are seven Green User LEDs that can be controlled directly from FPGA pins. One RGB LED is also included. Two Pushbuttons are available for input to user code.
- One 50MHz oscillator provides all precision clocking needs on the CycloFlex Board. The FPGA includes four DLL's that provide both frequency multiplier and divider. This provides a broad range for clocking options for user code.
- There are two power options for the CycloFlex: USB-C connector or Barrel Connector. The USB-C options allows +5VDC through the USB 2.0 specification. Any USB-C charger or Laptop will properly power the CycloFlex. The Barrel Connector accepts +4.5 to +5.5VDC at 3Amps.
- The CycloFlex Development Kit comes complete with downloadable User Manual, Data Sheet, Drivers, Schematics, and compiled, source code, projects. The downloadable DVD has an entire tutorial on Getting Started with FPGA. It walks the user through getting the ModelSim/Questa simulation tool setup. It has guides to creating simple code for FPGAs through more advanced Test Benches. It also includes full projects with source code to communicate with the CycloFlex from a Windows PC.
- 215,000 cubic yards of soil moved.
- 15,000 cubic yards of concrete poured for the foundation and grounds.
- 2,900 tons of steel used in the building frames.
- 135,000 square feet of glass-fiber-reinforced concrete in the precast façades.
- More than 5,000 miles of wire and cable installed within and between the buildings.
The buildings’ curved metal roof treatment and enclosed bridges gave the campus a distinctive form. A later architectural account describes open offices, shared amenities and a “fab lab”-type research space as elements of its workplace approach. That account is useful design context, but it is retrospective; it does not establish that the layout produced specific business results. See the later AIA project account.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How the size figures differ
The contemporaneous EE Times report gives the campus as approximately 25 acres and 500,000 square feet. A later architectural résumé lists 27 acres and 508,000 square feet. These are close but not identical figures, and the available material does not explain whether the difference reflects rounding, site boundaries or measurement conventions. For the move itself, the 1997 report’s rounded figures are the clearest contemporary account.
A later Altera office-history document lists the corporate address as 101 Innovation Drive, San Jose, CA 95134. That corroborates the campus location, but it should not be mistaken for the exact address wording in the 1997 news report. View the reproduced Altera office-history material.
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- The board includes a 50MHz Oscillator to provide high speed control over internal gates of the MAX 10 FPGA. With 4K Logic Elements, the User can create powerful projects. The MaxProLogic is 100% compatible with the Free Quartus Prime Lite software from Altera. Just download the Quartus software from Altera, and the User can create projects, compile the code, simulate the project in a digital simulator, then download to the MAX 10 using an external programmer.
- 8 Analog Input Channels; 12 bit; 1MSamples/Second. 65 Available I/O’s at connectors. A full datasheet of the MaxProLogic is available that describes all the hardward connections. Schematic is available to give the User further information about the hardware.
- 8 Green User configurable LEDs, On/Off controller. 1 Power Pushbutton Switch; 1 User Configurable Pushbutton Switch. Source code is available to assist the user in understanding how get up and running with the MaxProLogic board.
- Complete Development Kit with tutorials and source code. Please visit the MaxProLogic product page under the earthpeopletechnology website to access all schematics, user manual, data sheets and project files. The MaxProLogic tutorials will get the beginner up and learning Programmable Logic very quickly.
Altera’s 1997 context
The headquarters move took place during a busy period in Altera’s corporate and product timeline. The company’s 1997 milestones included the FLEX 6000 and MAX 7000A architectures and the announcement of a two-million-gate device family. That context helps explain why a larger headquarters with additional product-test space and capacity mattered, without showing that the campus itself caused the company’s product or business developments.
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The record establishes the relocation, the campus’s reported size and functions, the initial employee count and the planned capacity. It does not establish whether the campus ultimately reached 2,000 occupants, what happened to the former leased offices, or who owns or uses the site today. Those later outcomes should not be inferred from a 1997 report.
The central significance of the move is practical: Altera brought dispersed headquarters staff together in its first owned headquarters, on a campus built to support office and product-test work and accommodate expected growth. It was a corporate headquarters project, not evidence of a new chip-fabrication plant.
Quick Recap
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